The block consists of voltage detector, power on reset and NOR3 gate.
The block consists of voltage detector, power on reset and NOR3 gate.
The voltage detector is a comparator that compares input voltage with reference voltages.
The power on reset is a special circuit that generates a signal after rising supply voltage required for the initial state of the triggers.
The block is designed on Global Foundries CMOS 55nm technology.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 55nm | 55 550 nm | Silicon Proven |
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Power on Reset with detector is a Power On Reset (POR) IP core from NTLab listed on Semi IP Hub. It is listed with support for globalfoundries Silicon Proven.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.