Gold standard for JEDEC® ONFI memory device for your IP, SoC, and system-level design verification.
- Verification IP
- Controller
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Gold standard for JEDEC® ONFI memory device for your IP, SoC, and system-level design verification.
In production since 2018 for many production designs.The Cadence® Memory Model Verification IP (VIP) for OctaRam provides verific…
In production since 2011 for dozens of designs.
Simulation VIP for MIPI UniPro
Best-in-class MIPI® UniPro Verification IP for your IP, SoC, and System-Level Design Testing In production since 2011 on dozens o…
Cadence provides a mature and comprehensive Verification IP (VIP) for the MIPI® SPMIsm (System Power Management Interface) protoc…
Simulation VIP for MIPI SoundWire-I3S
Best-in-class MIPI® SoundWire-I3Ssm (SWI3S) Verification IP for your IP, SoC, and system-level design testing.The Cadence® Verifi…
Simulation VIP for MIPI SoundWire
In production since 2015 on dozens of production designs.The Cadence®Verification IP (VIP) for the MIPI® SoundWiresm Protocol pro…
Simulation VIP for MIPI SLIMbus
Cadence provides a mature and comprehensive Verification IP (VIP) for the SLIMbus protocol, which is part of the MIPI family.
Cadence provides a mature and comprehensive Verification IP (VIP) for the MIPI® RF Front-End Control Interface (RFFEsm) protocol.
Best in class MIPI® M-PHYsm Verification IP for your IP, SoC, and, System-level Design Testing In production since 2011 on dozens…
In production since 2015 on dozens of production design.The Cadence® Verification IP (VIP) for MIPI® I3Csm VIP provides support f…
In production since 2008 on dozens of production designs.Cadence provides a mature and comprehensive Verification IP (VIP) for th…
Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for MIPI® DPIsm Protocols …
Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for MIPI® DBI-2sm Protocol…
Simulation VIP for MIPI D-PHY, C-PHY and A-PHY
Cadence provides a mature and comprehensive Verification IP (VIP) for the D-PHY/C-PHY/A-PHY, which is part of the MIPI family.
Cadence's best-in-class Verification IP (VIP) for MIPI® CSI-2sm for IP, SoCs and, system-level design testing.
In production since 2015 on dozens of production designs.This Cadence® Verification IP (VIP) supports the JEDEC® Low-Power Memory…
In production since 2015 on dozens of production designs.This Cadence® Verification IP (VIP) supports the JEDEC® Low Power Memory…
The Cadence® JTAG Verification IP provides support for the JTAG protocol specification.
Cadence provides a mature and comprehensive Verification IP (VIP) for the JESD204 protocol.