Vendor: Cadence Design Systems, Inc. Category: MIPI

Simulation VIP for MIPI DBI

Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for MIPI® DBI-2sm Protocol…

Verification IP View all specifications

Overview

Incorporating the latest protocol updates, the mature and comprehensive Cadence® Verification IP (VIP) for MIPI® DBI-2sm Protocols provides a complete bus functional model (BFM), and integrated automatic protocol checks. DBI VIP is used with DSI VIP. Designed for easy integration in testbenches at IP, system-on-chip (SoC), and system levels, the VIP for DBI helps you reduce time to test, accelerate verification closure, and ensure end-product quality. Our VIP for DBI runs on all major simulators and supports SystemVerilog verification language along with associated methodologies, including the Universal Verification Methodology (UVM) and Open Verification Methodology (OVM).

Supported specification: MIPI DBI v2.0.

Key features

  • Configuration/Data
    • Supports protocol checks of signal timings
  • Data
    • Supports a variety of callbacks for better control and monitor functions
  • PHY Interfaces
    • Type A configuration (8,9,16 bits of data bus width)
    • Type B configuration (8,9,16 bits of data bus width)
    • Type C option
  • Physical Layer
    • Supports all signals timing per interface configuration
  • Transmitter and Receiver
    • Drives or monitors all commands from the Display Command Set (DCS)

Block Diagram

Simulation VIP for MIPI DBI block diagram

Specifications

Identity

Part Number
Simulation VIP for MIPI DBI
Vendor
Cadence Design Systems, Inc.
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about MIPI IP core

DDR5 MRDIMM Gen2: The Missing Link in Scaling AI Infrastructure

Cadence leads the market with its DDR5 MRDIMM 12.8 Gbps Gen2, TSMC N3P IP system solution, establishing a new benchmark for industry-leading PPA. Key industry leaders have already adopted this solution, which is now also available in the TSMC N2P and N5/N4P process nodes.

Frequently asked questions about MIPI IP cores

What is Simulation VIP for MIPI DBI?

Simulation VIP for MIPI DBI is a MIPI IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.

How should engineers evaluate this MIPI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP