Simulation VIP for DDR4 LRDIMM
First to market with full DDR4 LRDIMM support.This Cadence® Verification IP (VIP) supports the JEDEC® DDR4 Unbuffered DIMM (UDIMM…
- Verification IP
- Controller
- DDR4
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Simulation VIP for DDR4 LRDIMM
First to market with full DDR4 LRDIMM support.This Cadence® Verification IP (VIP) supports the JEDEC® DDR4 Unbuffered DIMM (UDIMM…
In production since 2011 on dozens of production designs.This Cadence® Verification IP (VIP) supports the JEDEC® Low Power Memory…
The Cadence® Verification IP (VIP) for Compute Express Link (CXL) is part of the Cadence family of VIP for PCI Express® (PCIe®).
In production since 2018.
Cadence provides a mature and comprehensive Verification IP (VIP) for the CCIX specification which is an open standard for a new …
Cadence provides a mature and comprehensive Verification IP (VIP) for the CAN (Controller Area Network) Protocol.
Cadence Bluetooth Verification IP (VIP) is a part of the Cadence® wireless Verification IP portfolio.
The Cadence® Verification IP (VIP) for SWD provides support for the Serial Wire Debug protocol which is part of the Arm® Debug In…
Simulation VIP for AMBA Stream
Cadence provides a mature and comprehensive Verification IP (VIP) for the AXI4-Stream specification which is part of the Arm® AMB…
Best-in-class Arm® AMBA® LTI Verification IP (VIP) for your IP, SoC, and system-level design testing.Cadence provides a mature an…
Cadence provides a mature and comprehensive Verification IP (VIP) for the LPI specification which is part of the Arm® AMBA® famil…
Cadence provides a mature and comprehensive Verification IP (VIP)for theDistributed Translation Interface (DTI) specification, wh…
Cadence provides a mature and comprehensive Verification IP (VIP) for the CXS specification which is part of the Arm® AMBA® famil…
Best-in-class Arm® AMBA® CHI Verification IP (VIP) for your IP, SoC, and System-level Design Testing Cadence provides a mature an…
Cadence provides a mature and comprehensive Verification IP (VIP) for the AXI specification which is part of the Arm® AMBA® famil…
Cadence provides a comprehensive solution to address Arm® AMBA® Adaptive Traffic Profiles (ATP) specification.
Cadence provides a mature and comprehensive Verification IP (VIP) for the Trace Bus (ATB) specification which is part of the Arm®…
Cadence provides a mature and comprehensive Verification IP (VIP) for the Peripheral Bus (APB) specification, which is part of th…
Cadence provides a mature and comprehensive Verification IP (VIP) for the AHB specification which is part of the Arm® AMBA® famil…
Cadence provides a mature and comprehensive Verification IP (VIP) for the ACE specification which is part of the Arm® AMBA® famil…