Clocking and timing IP cores are fundamental to semiconductor designs that require accurate clock generation, distribution, synchronization, and timing control. This category includes PLLs, DLLs, oscillators, and clock generators used in SoCs, ASICs, SerDes subsystems, processors, memory interfaces, and communication devices.
Browse clocking and timing IP from multiple vendors to compare jitter, frequency range, locking behavior, power consumption, programmability, and process support. Semi IP Hub helps chip architects and design engineers identify the right timing IP for high-performance and low-power silicon platforms.
Ultra-Low Power Fractional PLL IP in in TSMC (12/16nm FFC, 22nm ULP/ULL, 28nm HPC+)
Low Power Fractional PLL is a general purpose frequency synthesizer with an input reference frequency range from 10 to 240 MHz an…
Low Power Fractional PLL IP in TSMC(12/16nm FFC, 22nm ULP/ULL, 28nm HPC+)
M31 LPFPLL is a low-power programmable fractional-N (LPF), phase-locked loop (PLL) for frequency synthesis.
Low Power PLL for TSMC 40nm ULP
The OT3135 is a flexible low power clock multiplier PLL function with a wide range of input and output frequencies, and is design…
Dual WideBand Frequency Synthesizer with Integrated VCO and Loop Filter - GlobalFoundries 55nm
CorePLL is a wideband phase-locked loop (PLL) system for 2G (GSM) 3G and 4G (LTE), including Carrier Aggregation (CA) for 3GPP Re…
True-ULP 32.768kHz RTC Oscillator - Current Consumption<120nA - Silterra 0.18µm
This macro-cell is a true ultra-low-power, general purpose 32.768kHz internal oscillator core consuming 120nA when fully function…
6MHz ±1% PVT 1.8V Low Power Oscillator in Silterra 0.18um
This macro-cell is a low-power, precision, general purpose 1.8V 6MHz ±1% PVT internal oscillator core aimed for clock generation.
6MHz 3.3V Low Power Oscillator - ±1% after trimming. Re-targetable to 1-30MHz - Silterra 0.18µm
This macro-cell is a low-power, precision, general purpose 3.3V 6MHz ±1% PVT internal oscillator core aimed for clock generation.
ULP 32.768kHz oscillator in Silterra 0.18 um
This macro-cell is an ultra-low power, general purpose 32.768kHz internal oscillator core aimed for RTC (real time clock) applica…
Low frequency XTAL oscillator optimized for low power
The Always-On domain, over which the power islets emerge, requires a specific panoply of clocks.
Linear Regulator, Low-noise optimized for sensitive application such as RF or PLL blocks
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RadHard Wideband SiGe VCO for Low Ultra Low Noise Application
CoreVCO chip consists of two ultra low phase noise, wideband RadHard VCOs (VCOBJT and VCOPMOS) for space and other critical envir…
The PLL IP is a high speed, wide range, integer PLL with small physical area.
2MHz Ultra Low Power Oscillator - Ultra low power (720nW) Silterra 0.18 um
This macro-cell is a general purpose, ultra low power internal oscillator core designed for SilTerra 0.18μm CL180G CMOS technolog…
Clock Buffer - X-FAB XT018-0.18µm BCD-on-SOI CMOS
The TS_CLKBUF_25pF_X8 transfers input clock signal to other digital or mixed-signal chips, which feature altogether a maximum loa…
8MHz / 40MHz Pierce Oscillator - X-FAB XT018-0.18µm
The TS_XOSC_40M_X8 is a 8MHz / 40MHz Pierce oscillator that generates a VCC-level logic square wave when a 8MHz / 40MHz quartz cr…
50MHz to 800MHz Integer-N RC Phase-Locked Loop on SMIC 55nm LL
055SMIC_PLL_01 forms clock output signal with frequency from 50 to 800MHz.
25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P
Fractional-N Phase locked loop frequency synthesizer is intended for ASIC clock generation.
2.26GHz/2.46GHz Fractional-N LC Phase-Locked Loop with oscillator
180XFAB_PLL_01 uses 2.25792GHz/2.4576GHz Phase locked loop frequency synthesizer for clock generation.
The LCPLL (with 4-phase outputs) addresses stringent performance requirements for various low jitter applications, including high…
18-40MHz Crystal Oscillator on INTEL-16
High end consumer and professional applications require crystals with a minimum number of external components.