ULP 32.768kHz oscillator in Silterra 0.18 um
This macro-cell is an ultra-low power, general purpose 32.768kHz internal oscillator core aimed for RTC (real time clock) applica…
Overview
This macro-cell is an ultra-low power, general purpose 32.768kHz internal oscillator core aimed for RTC (real time clock) applications.
A 6-bit digital bus allows frequency adjustment against process variations. It has self-biased, built-in references and doesn’t require external ones. The core is easily retargeted to any other CMOS technology due to its MOSFET-only oscillator architecture.
Key features
- 32.768kHz ±5.1%
- ULP ( Ptot < 1.3uW )
- Low TC
- 6-bit trimming
- Self-biased, built-in references
- Area: 0.032 um2 (153 µm x 210 µm)
Block Diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| Silterra | 180nm | G | — |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Oscillator IP cores
What is ULP 32.768kHz oscillator in Silterra 0.18 um?
ULP 32.768kHz oscillator in Silterra 0.18 um is a Oscillator IP core from Chipus Microelectronics listed on Semi IP Hub. It is listed with support for silterra.
How should engineers evaluate this Oscillator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Oscillator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.