What is 25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P?
25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P is a PLL IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.
Fractional-N Phase locked loop frequency synthesizer is intended for ASIC clock generation.
Fractional-N Phase locked loop frequency synthesizer is intended for ASIC clock generation. The Fractional-N PLL loop with 2GHz-4GHz VCO has high phase noise performance and ultra-fine frequency tuning step.
VCO Sub-band auto select (SAS) system allows to find automatically appropriate sub-band for VCO on locked PLL.
The block embeds reference current sources.
Silicon area: 0.01254mm2 (108um x 115um)
ELECTRICAL CHARACTERISTICS
|
Parameter |
Symbol |
Conditions |
Value |
Units |
||
|
min |
typ |
max |
||||
|
Supply voltage |
PLL_VDD |
- |
0.675 |
0.75 |
0.825 |
V |
|
Operating temperature range |
Tj |
Junction |
-40 |
27 |
125 |
ºС |
|
Output frequency |
Fout |
- |
25 |
- |
4000 |
MHz |
|
Phase noise |
LOPN |
at 10MHz |
- |
-107 |
- |
dBc/Hz |
|
at 1GHz |
- |
-147 |
- |
dBc/Hz |
||
|
Output clock period jitter |
Jperiod |
- |
- |
0.6 |
- |
ps |
|
Reference frequency |
Fref |
- |
4.0 |
- |
1600 |
MHz |
|
Lock time |
Tlock |
- |
- |
50 |
- |
us |
|
Start-up time |
Tstart |
- |
- |
3.1 |
- |
ms |
|
Output frequency fine tuning range |
A |
From center frequency |
-1000 |
- |
1000 |
ppm |
|
LO duty cycle |
LODC |
- |
45 |
- |
55 |
% |
|
Current consumption |
Icc |
- |
- |
3.0 |
5.0 |
mA |
|
Shutdown current |
Istd |
- |
- |
15 |
900 |
uA |
|
Reference signal - high level |
VRefH |
CMOS |
PLL_VDD-0.1 |
- |
PLL_VDD |
V |
|
Reference signal - low level |
VRefL |
0 |
- |
0.1 |
||
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 3nm | N3P | Pre-Silicon |
Note: some files may require an NDA depending on provider policy.
25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P is a PLL IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.