6MHz 3.3V Low Power Oscillator - ±1% after trimming. Re-targetable to 1-30MHz - Silterra 0.18µm
This macro-cell is a low-power, precision, general purpose 3.3V 6MHz ±1% PVT internal oscillator core aimed for clock generation.
Overview
This macro-cell is a low-power, precision, general purpose 3.3V 6MHz ±1% PVT internal oscillator core aimed for clock generation. A 7 bit digital bus allows frequency adjustment against process variations.
It features a self-biased, built-in references.
The core can be easily retargeted to any other frequencies between 1MHz and 30MHz and other CMOS technology that includes poly resistors.
Key features
- 6MHz +/- 1% PVT after trimming
- Supply 3.3V +/- 10%
- Low power (20uA)
- Low TC (>115ppm/oC)
- 7-bit trimming
- Self-biased, built-in references
- Indicative area: 0.015mm2
- Load capacitance: <100fF
Block Diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| Silterra | 180nm | G | — |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Oscillator IP cores
What is 6MHz 3.3V Low Power Oscillator - ±1% after trimming. Re-targetable to 1-30MHz - Silterra 0.18µm?
6MHz 3.3V Low Power Oscillator - ±1% after trimming. Re-targetable to 1-30MHz - Silterra 0.18µm is a Oscillator IP core from Chipus Microelectronics listed on Semi IP Hub. It is listed with support for silterra.
How should engineers evaluate this Oscillator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Oscillator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.