David vs. Goliath: Can Small Models Win Big with Agentic AI in Hardware Design?

By Shashwat Shankar ¹, Subhranshu Pandey ¹, Innocent Dengkhw Mochahari ¹, Bhabesh Mali ¹, Animesh Basak Chowdhury ², Sukanta Bhattacharjee ¹, Chandan Karfa ^1
1 Indian Institute of Technology, Guwahati, India
² NXP USA, Inc.

Abstract

Large Language Model(LLM) inference demands massive compute and energy, making domain-specific tasks expensive and unsustainable. As foundation models keep scaling, we ask: Is bigger always better for hardware design? Our work tests this by evaluating Small Language Models coupled with a curated agentic AI framework on NVIDIA's Comprehensive Verilog Design Problems(CVDP) benchmark. Results show that agentic workflows: through task decomposition, iterative feedback, and correction - not only unlock near-LLM performance at a fraction of the cost but also create learning opportunities for agents, paving the way for efficient, adaptive solutions in complex design tasks.

 Keywords:  AI assisted Hardware Design, Agentic AI, Large Language Model,  Small Language Model, Benchmarking

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