Cadence Leads the Pack: The First VIP for USB4 is Here!
On March 14th, Cadence announced the release of the industry’s first USB4-supporting Verification IP! The Cadence VIP for USB4 allows engineers to design and create cutting-edge SoC designs compliant with the current standards that are completely functionally verified and require less time.
“Support from [USB Implementers Forum] members like Cadence helps reduce the barriers to adoption of new USB protocols and enables innovative products from new industries to enter the market,” says Jeff Ravencraft, USB-IF President and COO.
To read the full article, click here
Related Semiconductor IP
- Zigbee Transceiver PHY
- Data Flow Architecture IP
- AMBA SPI Controller MRAM Controller
- Ethernet MAC
- Protocol Bridges
Related Blogs
- USB4 Port Operations
- Cadence Adds 10 New VIP to Strengthen Verification IP Portfolio for AI Designs
- VESA Adaptive-Sync V2 Operation in DisplayPort VIP
- Validating UPLI Protocol Across Topologies with Cadence UALink VIP
Latest Blogs
- IDS-NoC: A Scalable Interconnect Solution for Modern SoC Design
- Leading-edge AI IC designs demand comprehensive HAV methodologies
- Beyond the Fab: Building Europe’s Next Generation of Semiconductor Champions
- AI Semiconductor Design at 3nm and 2nm: Silicon-Proven IP
- Samsung Foundry and Cadence Expand Infrastructure and Physical AI Solution