UCIe D2D Adapter IP Listing

Industry , Silicon Proven, 32 Gbps per pin, backed by a portfolio of verification tools, PHY interoperability and integration.

• UCIe

A UCIe solution ready to support any protocol layer The D2D Adapter for UCIe combined with the UCIe PHY from a UCIe solution read…

• UCIe

Accelerated confidence in simulation-based verification of RTL designs with Universal Chiplet Interconnect Express (UCIe) interfa…

• Verification IP

The UCIe Controller consists of Universal Chiplet Interconnect Express (UCIe) Die-to-Die (D2D) Adapter and Protocol Layers.

• Controller
• UCIe 1.1

The UCIe Controller consists of Universal Chiplet Interconnect Express (UCIe) Die-to-Die (D2D) Adapter and Protocol Layers.

• Controller
• UCIe 1.1

Industry , AXI5-Stream Solution for UCIe D2D Stacks The AXI-S Protocol Layer for UCIe is a protocol adapter layer between a Strea…

• UCIe

The UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe- (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 spec…

• UCIe

The UCIe IP solution includes D2D Adapter layer which supports streaming/PCIe/CXL/Raw flitformats, supports both standard and mai…

• UCIe

Best-in-Class UCIe Verification IP for your IP, SoC, and System-Level Design Testing The Cadence Verification IP (VIP) for Univer…

• Verification IP

SmartDV’s UCIe 3.x Controller IP is a next-generation Universal Chiplet Interconnect Express solution engineered for the most dem…

• Controller

Specifications: UCIe v1.0, v1.1, v2.0, v3.0 Interfaces: FDI/RDI/PHY link DUT Types/Topology D2D Adapter, Phy, Protocol, Full Stac…

• Verification IP

The Die-to-Die interface is a functional block that provides a data interface between two chip dies within the same package.

• UCIe

The Die-to-Die interface is a functional block that provides a data interface between two chip dies in the same package.

• UCIe

High-Performance AXI to UCIe FDI Interface IP for Scalable System Integration

• UCIe

The UCIe Chiplet IP offers a cutting-edge solution for seamless, low-latency data transfer between dies and chips, enabling heter…

• UCIe