D2D UCIe 1.1
The Die-to-Die interface is a functional block that provides a data interface between two chip dies within the same package.
Overview
The Die-to-Die interface is a functional block that provides a data interface between two chip dies within the same package. MSquare's D2D solution, compatible with the UCIe v1.1 specification, includes both a Die-to-Die adapter layer and a physical layer. Each layer features a sideband interface that provides a back-channel for link training and access to the registers of the link partner, as shown in Figure 1. This unique hybrid analog/digital architecture offers low power consumption, compact footprint, and robust performance, making it well-suited for target applications such as high-performance computing, AI, or multimedia SoCs, and Die-to-Die interconnections.
Key features
- Compatible with UCIe v1.1 specification
- Features single-ended, source-synchronous, and DDR I/O signaling
- Supports 32-bit (16-bits TX + 16-bit RX) data bus per module for standard packages
- Offers a high clock frequency up to 16GHz
- Provides data transfer rate up to 32Gbps per lane
- Delivers 1Tbps (512Gbps TX + 512Gbps RX) bandwidth per module for standard packages
- High energy efficiency with ~0.8pJ/bit for standard packages
- Built-in test and diagnostics [Functional (PRBS), scan, at-speed external loopback]
- The advanced 12nm/6nm process
Block Diagram
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about UCIe IP core
Cadence Tapes Out 32GT/s UCIe IP Subsystem on Samsung 4nm Technology
UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
The Next-Generation UCIe IP Subsystem for Advanced Package Designs
Cadence Silicon Success of UCIe IP on Samsung Foundry’s 5nm Automotive Process
40G UCIe IP Advantages for AI Applications
Frequently asked questions about UCIe IP cores
What is D2D UCIe 1.1?
D2D UCIe 1.1 is a UCIe IP core from MSquare listed on Semi IP Hub.
How should engineers evaluate this UCIe?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UCIe IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.