USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+
The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwid…
- USB 3.1
- SMIC
- 14nm
- SF+
- In Production
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+
The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwid…
800G Multi-Channel MACsec Engine with TDM Interface
The MACsec-IP-164 is a MACsec/IPsec engine developed specifically for high-speed, multi-rate and multi-port Ethernet devices.
USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.0 Base Specification with support…
World-class, industry-leading, highly scalable, silicon- and PHY-agnostic IP core with 116 Gbps line rate, interoperability tested with leading Serdes providers
Sensor / Display MIPI A-PHY Source IP
The CL12911IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking ap…
Sensor/Display MIPI A-PHY Sink IP
The CL12912IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking ap…
Silicon agnostic implementation of the Physical Coding Sublayer (PCS) compliant with Ethernet standard IEEE 802.3-2018 The Ethern…
PCIe is the most common protocol in high speed serial standards to connect components in embedded systems.
MIPI M-PHY v4.1 IP, Silicon Proven in UMC 28 HPC
The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-…
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 28 HPC+
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specific…
MIPI M-PHY v3.1 IP, Silicon Proven in UMC 40LP
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3.0 Specification, UniPro v1.8 Specific…
USB-C 3.1 SS/SSP PHY, Type-C IP (Silicon proven in UMC 55SP/ EF)
A high performance, high-speed SERDES IP called USB3.1Type-C PHY is created for semiconductors that provide high bandwidth data c…
SD4.1 UHS-II IP utilizes distinctive SerDes technology to attain a speed of 312MB/s for UHS-II while maintaining low power consum…
8-bit <=120GSa/s Ultra-high-speed DAC in TSMC 16nm CMOS
DAC IP Macro.
All Digital Fractional-N RF Frequency Synthesizer PLL in Samsung 14LPP
The DeepSub™ pPLL08F is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…
All Digital Fractional-N RF Frequency Synthesizer PLL in Samsung 8LPP
The DeepSub™ pPLL08F is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…
All Digital Fractional-N RF Frequency Synthesizer PLL in GlobalFoundries 22FDX
The DeepSub™ pPLL08W is an all digital RF frequency synthesizer PLL featuring industry jitter (sub 300fs), phase noise and compac…
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 12FFC
The MIPI M-PHY Gear 4 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4…
The LVDS transceiver IP is a SERDES pair that clearly interprets 12–bit parallel bus into serial stream.
The programmable Fractional-N PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplicati…