IP Accelerated (Bye Bye EDA 360)
Eric Esteve
Vendor:
T2M GmbH
Category:
MIPI PHY
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 12FFC
The MIPI M-PHY Gear 4 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4…
Overview
The MIPI M-PHY Gear 4 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal Flash Storage (UFS) v3.0 Specification. A serial interface technology with high bandwidth capabilities and supports HS Gear4 rates up to 11.6Gbps, which is particularly developed for mobile applications to obtain low pin count combined with very good power efficiency. The MIPI M-PHY Gear 4 IP compliant to the RMMI interface which allows UniPro controller and UFS Controller. The MIPI M-PHY provides robust testability by low-cost Build-In-Self-Test (BIST), and receiver eye data monitoring and debugging function for embedded system.
Key features
- Compliant with M-PHY Spec 4.1, UniPro Spec 1.8, UFS Spec 3.0
- Support HS-MODE Gear4(A/B) with data rate up to 11.6Gb/s, and backward compatible
- Support LS-MODE PWM-G1 to PWM-G5 with data rate up to 144Mb/s
- Support reference clock frequency with 19.2/26/38.4/52MHz defined in UFS spec.
- Support RMMI interface for Type-I application
- Receiver eye open for monitoring and debugging
- Support Build-In-Self Test(BIST) for low-cost CP/FT
- Silicon Proven in TSMC 12FFC
Block Diagram
MIPI M-PHY v4.1 IP in 12FFC block diagram
Benefits
- RX:DFE+CTLE, TX:2-tap FFE
- Max. Channel Loss:~14dB @6GHz Nyquist
- Low operation current and low standby current
- Competitive IP PPA leading in the market
What’s Included?
- Application Note / User Manual
- Behaviour model, and protected RTL codes
- Protected Post layout netlist and Standard Delay Format (SDF)
- Library (LIB)
- Frame view (LEF)
- Metal GDS (GDSII)
- Test patterns and Test Documentation
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 12nm | FFC | In Production |
Specifications
Identity
Part Number
MIPI M-PHY v4.1 IP in 12FFC
Vendor
T2M GmbH
Type
Silicon IP
Standards & Interfaces
MIPI PHY
MIPI M-PHY
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Germany
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Frequently asked questions about MIPI PHY IP
What is MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 12FFC?
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 12FFC is a MIPI PHY IP core from T2M GmbH listed on Semi IP Hub. It is listed with support for tsmc In Production.
How should engineers evaluate this MIPI PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.