Vendor: Faststream Technologies Category: PLL

Fractional N Clock PLL

The programmable Fractional-N PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplicati…

Overview

The programmable Fractional-N PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication factor.This is a macro-block designed for synthesizing the frequencies required for fiber optic transceivers and serdes using convenient reference frequencies.The PLL except modulator is implemented based on differential CML logic for robust operation under strong noise coupling through power, ground and substrate. The generated clock can be locked to the input source yet adjusted to a fine-degree of precision, and may be adjusted on-the-fly to maintain a relatively drifting local clock need. The updatable programmable fractional feedback divider is provided for this purpose. Differential circuit techniques are employed to attain low jitter in the noisy environment typical of multi-million gates digital chip.


Key features

  • High performance Fractional-N PLL
  • Low power dissipation
  • No external components required
  • Integer Mode
  • Power-down Mode
  • Clock monitor output
  • Stand-by mode
  • 1.2V Power Supply
  • Low jitter output
  • 50% Duty Cycle Output divider
  • Adjustable (+/-30%) reference current
  • LOL detection

Applications

  • PLL is suitable for embedding in ASIC and SoC subsystems for:
  • LTE, WiFi, WiMAX, DAB, DAB+, FM, HDFM, DRM and many more

What’s Included?

  • Data sheet
  • GDSII
  • LVS Netlist
  • Integration Guidelines
  • Timing Model
  • Behavioral Model
  • LEF File for P&R

Specifications

Identity

Part Number
FST-FRCTNL-N-CLK-PLL
Vendor
Faststream Technologies
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about PLL IP core

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Specifying a PLL Part 2: Jitter Basics

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In high end RF systems, such as 5G radios, the requirements are so stringent that the source of this strongest unwanted tone can be the PLL. This article outlines how spurs in the input clock to the ADC or DAC may limit the SFDR. This in turn will set the requirements for the spurs for the input clock (from a PLL), in order to achieve a specific SFDR.

Achieving Groundbreaking Performance with a Digital PLL

This article compares analog, first-generation digital, and second-generation digital PLLs. It evaluates which type of PLL may be best in which situation. It further discloses a roadmap into other application areas, including general purpose / logic clocking, and regular low-jitter PLLs.

Frequently asked questions about PLL IP cores

What is Fractional N Clock PLL?

Fractional N Clock PLL is a PLL IP core from Faststream Technologies listed on Semi IP Hub.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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