USB4 Gen3 x2-lane PHY, TSMC N5, 1.2V, N/S orientation, type-C
The USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
- USB4
- TSMC
- 3nm
- N3X
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
USB4 Gen3 x2-lane PHY, TSMC N5, 1.2V, N/S orientation, type-C
The USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
USB4 Gen3 x2-lane PHY, TSMC N6, 1.8V or 1.2V, N/S orientation, type-C
The USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
USB4 Gen3 x2-lane PHY, TSMC N7, 1.8V or 1.2V, N/S orientation, type-C
The USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
USB4 Gen3 x2-lane PHY, TSMC 12FFC, 1.8V, N/S orientation, type-C
The USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
Rambus is offering the industry’s first HBM4 Controller IP core designed to support customers with deploying a new generation of …
Centralised Network Configurator
Software solution targeting the configuration of Ethernet switches and endpoints in TSN networks Centralized Network Configurator…
Get to market faster using our highly configurable network on chip
1.8V Capable GPIO on Samsung Foundry 4nm FinFET
The 1.8V capable GPIO is an IP macro for on-chip integration.
The 1G UDP Stack IP® enables efficient data transmission over the internet using the UDP protocol for low-latency, loss-tolerant …
The 10G UDP IP Stack offers a hardware protocol stack for efficient UDP/IP communication over LANs or point-to-point connections.
The 40G UDP IP Stack enables fast communication over LAN or point-to-point connections, even without a CPU, by handling UDP/IP en…
UCIe-S PHY for Standard Package (x32) in TSMC N3P, East/West Orientation
The UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale …
Optimize your 5G NR O-RAN Split 7.2X design with EIC cutting-edge PRACH Design and Verification Suite.
Single Port Low Leakage SRAM Memory Compiler on GF 22FDX
Single port SRAM compiler with optional redundancy, low power retention mode, and three speed options
Single Port Low Leakage Register File Compiler - GF 22FDX
Single port register file compiler with low power retention mode and three speed options Bit Cell Power Supply (V) P110UL 0.8
GPNPU Processor IP - 1 to 7 TOPs
Designed from the ground up to address significant machine learning (ML) inference deployment challenges facing system on chip (S…
IP
Active Programmable Low Pass Filter
The WEA321250LPF25CH5ST55 is an active 5th order Chebyshev Low Pass filter, synthesized in a Leapfrog architecture.
Fully compliant solution that provides Ethernet Layer 2 Security for port and data privacy The MAC Privacy Protection IP is a ful…
The NTN System Test Bench (STB) is a cost-effective, flexible environment for NTN satellite network operators or applications dev…