Silvaco, Inc. IP Cores

The AHB-Lite to SPI Bridge is used to translate 32-bit AHB-Lite Writes and Reads to Writes and Reads over a SPI interface.

• SPI / QSPI XSPI
• Silicon Proven
• AHB

The Encryption Standard (AES) IP Core is a hardware implementation encryption/decryption algorithm described in the U.S.

• AES

The AXI 5-Master component SRAM Controller provides 5 AXI 64-bit Master components with low-wait-state access to a single interna…

• Bus Fabric

The I3C Target Lite is a configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivi…

• I2C / I3C

The Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data t…

• Single-Protocol PHY
• Silicon Proven
• Now

Specifically designed for ultra-low power applications, this memory leverages body biasing to dramatically reduce power consumpti…

• GlobalFoundries
• 22nm
• FDX
• In Production

Natively designed to be ultra-low power, this memory leverages body biasing to reduce static power consumption, meeting the strin…

• GlobalFoundries
• 22nm
• FDX

This is a implementation of a 16550 UART.

• UART
• Silicon Proven
• Now

The AHB-Lite to AHB-Lite Asynchronous Bridge translates an AHB-Lite bus transaction (read or write) on one clock domain to an AHB…

• Protocol Bridge
• Silicon Proven
• now
• AHB-Lite

The AHB Parallel Flash Controller allows an AHB Master component (usually a CPU) to read, program, or erase the connected arrange…

• Controller

The M8051EW and M8051W microcontroller cores are high performance versions of the popular 8051 8-bit microcontroller.

• CPU
• Silicon Proven

Building upon the 68K foundation, ColdFire offers RISC performance with industry- code density and a rich set of connectivity per…

• CPU
• Silicon Proven
• Now

The LINFlexD Controller is a serial communication interface designed for Local Interconnect Network (LIN) applications.

• LIN
• Silicon Proven
• now
• LIN 1.3, 2.0, 2.1, 2.2 AMBA…

The SPI to AXI Bridge IP core is commonly used as a monitor interface to allow external devices to access the internal AXI bus.

• Protocol Bridge
• Silicon Proven
• AHB

The AHB DES/TDES Encryption/Decryption Engine is a configurable core that interfaces to an AHB microprocessor bus.

• Symmetric Crypto

The ColdFire V4 Core & Standard Product Platform (CFV4SPP) combines the ColdFire V4 Core with industry-proven platform peripheral…

• CPU
• Silicon Proven
• Now

The AHB 4 Channel DMA Controller is a multiple-channel direct memory access controller.

• DMA
• AHB

The Quad Serial Peripheral Interface module either controls a serial data link as a master component, or reacts to a serial data …

• SPI / QSPI XSPI
• Silicon Proven
• Now
• AHB

The SPI to AHB Lite Bridge IP core is commonly used as a monitor interface to allow external devices to access the internal AHB b…

• SPI / QSPI XSPI
• Silicon Proven
• AHB

The APB Channel provides the necessary infrastructure to connect as many as 16 AHB Slaves (numbered 0-15) to an APB Bus Master.

• Protocol Bridge
• Silicon Proven
• Now
• APB