Vendor: Silvaco, Inc. Category: DMA

AHB Single Channel DMA Controller

The DMA is a configurable single channel direct memory access controller.

Overview

The DMA is a configurable single channel direct memory access controller. The DMA IP Core is a Verilog HDL design that can be used in ASIC, Structured ASIC and FPGA designs. The design is intended to be used with AMBA based systems as a controller to transfer data directly from system memory to memory or system memory to peripheral device or IP Core.

Once set up, the DMA controller is primarily an AHB Master, which initiates data transfers across the AHB bus to/from a peripheral device through the DMA Buffer. The DMA Buffer is a scalable x32bit FIFO, which is useful for peripheral devices requiring a steady stream of data such as an LCD Controller, Ethernet MAC or other communication device.

The DMA controller contains useful features such incrementing and non-incrementing addressing and link list operation. Linked list support is useful for non-contiguous memory transfer operations.

Multiple DMA controllers can be placed in the AHB System to provide multiple channel DMA control.

Key features

  • AHB Master/Slave DMA Controller
  • Single Channel – multiple instantiation
  • Memory to Memory, Memory to Peripheral, Peripheral to Memory, Peripheral to Peripheral modes
  • Source and destination address descriptors
  • Single word and burst transfer requests
  • Programmable burst size
  • Current address status
  • Incrementing and non-incrementing addressing
  • Linked list support
  • Transfer complete interrupt

Block Diagram

AHB Single Channel DMA Controller block diagram

What’s Included?

  • Verilog Source
  • Complete Test Environment
  • AHB Bus Functional Model

Specifications

Identity

Part Number
AHB Single Channel DMA Controller
Vendor
Silvaco, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Silvaco, Inc.
HQ: United States

Learn more about DMA IP core

Silvaco to Accelerate Physics-Based Digital Twins for Semiconductor Design and Manufacturing Using NVIDIA AI and Accelerated Computing

Silvaco is combining decades of physics-based modeling expertise with NVIDIA’s accelerated computing, CUDA-X™ libraries, PhysicsNeMo, Omniverse libraries, and Nemotron open models to help customers build, train, and deploy high-fidelity digital twins capable of predicting, optimizing, and validating complex semiconductor systems with unprecedented speed and accuracy.

Silvaco Reports Fourth Quarter and Full-Year 2025 Financial Results

Secured second artificial intelligence-driven machine learning (AI/ML) FTCO™ customer, driving revenue above high end of guided range. Executing cost reduction strategies ahead of expectations, resulting in operating expenses below midpoint of guided range. Q4’25 operating loss less than anticipated and cash burn, excluding one-time items, to reduce dramatically in Q1’26

Frequently asked questions about DMA IP

What is AHB Single Channel DMA Controller?

AHB Single Channel DMA Controller is a DMA IP core from Silvaco, Inc. listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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