Vendor: Sofics Category: Custom

TSMC 4nm 0V75 D2D AFE

This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow.

TSMC 4nm N4AE Available on request View all specifications

Overview

This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow.

Sofics high-speed interface IP enables robust signal transmission and reception at multi-Gb/s data rates while minimizing loading, distortion, and power consumption. Solutions include high-speed amplifiers, drivers and receivers, analog front-end circuits, CTLEs, T-coils, and low-capacitance ESD protection optimized for advanced technology nodes.

The designs can be tailored to the required bandwidth, signaling standard, load, and voltage domain, combining signal conditioning and ESD protection to maintain signal integrity with minimal impact on interface performance.

Details

Parameter Value
VDD 0.75 V ±10%
Temperature Tj -40 C to 105 C

Key Features

Parameter Value
Rise time (10-90)1 <50 ps
Fall time (10-90)1 <50 ps
BER 1e-24
ESD robustness 250V HBM

Area

Type Size [μm²]
IO/AFE 6252

1 Data measured at receiver pad with identical D2D IO circuit as receiver with 5 dB channel loss at Nyquist.
2 Area strongly depends on required ESD protection level.

Key features

  • Input/output enable
  • Single IP block for both organic laminate (<20 mm) and advanced packages (interposer/bridge/hybrid bonding, <5 mm)
  • Forwarded clock
  • <25×25 μm² area (TX, RX, ODT, ESD)
  • Available on request: ODT calibration, variable drive strength, local/remote loopback, lower VDD support

Block Diagram

Pin Schematic
1 / 2
Keyboard arrows: ← → • Enter: fullscreen • Esc: close

Benefits

  • Broad portfolio of IO configurations from a single base architecture
  • Modular design enables fast and reliable turnaround and low NRE
  • Proven across multiple advanced nodes
  • Optimized for performance, power, and area trade-offs

What’s Included?

  • GDSII or Oasis layout files
  • Extracted netlist for simulation
  • Liberty (.lib) timing models
  • Integration and application notes

Silicon Options

Foundry Node Process Maturity
TSMC 4nm N4AE Available on request

Specifications

Identity

Part Number
DS-TS4N-0V75-D2D-AFE
Vendor
Sofics
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Sofics
HQ: Belgium

Learn more about Custom IP core

Ensuring reliability in Advanced IC design

To complete our task as engineers we rely on the tools we use. We collaborated with Siemens EDA solutions back in 2025 on a webinar about how we use their tools to develop our designs and layouts.

Why ESD Co-Design is Essential for Next-Gen ICs

In the fast-moving world of semiconductor design, electrical overstress (EOS) and electrostatic discharge (ESD) remain stubborn challenges. As silicon nodes shrink and performance demands rise, traditional approaches to ESD protection are reaching their limits. The classic model of sequential ESD design—where the I/O or PHY circuitry is finalized before protection is added—is not only outdated, but also increasingly inefficient.

Not all overvoltage tolerant GPIOs are the same

Most foundries provide GPIO libraries to their fabless customers. These libraries contain different elements like supply/ground pads, analog I/Os, digital I/Os, corner cells, filler cells, power-on-reset circuits. Frequently the foundry includes cells for different voltage domains. In 40nm CMOS the IC designer can use cells for 1.8V, 2.5V and 3.3V for instance.

Frequently asked questions about Custom Die-to-Die IP cores

What is TSMC 4nm 0V75 D2D AFE?

TSMC 4nm 0V75 D2D AFE is a Custom IP core from Sofics listed on Semi IP Hub. It is listed with support for tsmc Available on request.

How should engineers evaluate this Custom?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Custom IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP