Vendor: SmartDV Category: Custom

AMBA CXS Assertion IP

AMBA CXS Assertion IP provides a smart way to verify the ARM AMBA CXS component of a SOC or a ASIC.

Overview

AMBA CXS Assertion IP provides a smart way to verify the ARM AMBA CXS component of a SOC or a ASIC. The SmartDV's AMBA CXS Assertion IP is fully compliant with standard AMBA CXS Specification.

AMBA CXS Assertion IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

AMBA CXS Assertion IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Specification Compliance
    • Compliant with the latest ARM AMBA CXS specification.
    • Supports credit exchange mechanism.
    • Supports Link activation and deactivation.
    • Support for skipping link activation.
    • Configurable credit mechanism including dynamic and pre-allocated credit control.
    • Support for Interface properties and possible options as per protocol.
    • Supports continuous delivery of data - uninterrupted transmission of packets.
    • Fine grain control of below:
    • Flit packets placement
    • Packet control fields
    • Ability to configure the width of all signals.
    • Support for error injection during Link activation and deactivation.
    • Programmable Protocol signal delays.
    • Rich set of configuration parameters to control CXS functionality.
    • Transaction logging and Performance Reporting support.

Block Diagram

AMBA CXS AIP block diagram

Benefits

  • Runs in every major formal and simulation environment.

What’s Included?

  • Detailed documentation of Assertion IP usage.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
AMBA CXS AIP
Vendor
SmartDV
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV
HQ: India

Learn more about Custom IP core

Keeping Pace with CXL Specification Revisions

As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about Custom Die-to-Die IP cores

What is AMBA CXS Assertion IP?

AMBA CXS Assertion IP is a Custom IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this Custom?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Custom IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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