Scale-Up Ethernet Ecosystem Ramps Up: Cadence ESUN Controller IP Available
Building on its High-Speed Ethernet controller IP family, Cadence provides ESUN-ready controller IP for next-generation AI scale-up networking.
Vendor:
Chevin Technology Limited
Category:
Ethernet
TCP/IP Offload Engine - 10G/ 25G/40G/100Gbit/s TCP/IP
Fast, reliable connectivity in any FPGA using a minimum of FPGA resources The TCP/IP (Transmission Control Protocol/ Internet Pro…
Overview
Fast, reliable connectivity in any FPGA using a minimum of FPGA resources
The TCP/IP (Transmission Control Protocol/ Internet Protocol) is an Ethernet IP stack for FPGAs that incorporates both the transport and internet layer protocols to deliver reliable, end to end network communications using the internet or on private networks. The TCP/ IP stack can be used with Chevin Technology’s 10G/25G/40G/100G Ethernet IP cores for dependable, low-latency connectivity in any FPGA using a minimum of FPGA resources.
Chevin Technology’s TCP/IP Offload Engine is an FPGA Synthesisable Ethernet TCP/IP server/client in a lean and fast, all-RTL solution. Chevin Technology’s TCP/IP offloads the TCP protocol using fast and efficient logic for checksum calculation. Valuable resources in your application are freed up by the TCP/IP which offloads the entire TCP stack onto FPGA logic. Using the FPGA to analyse packets instead of the CPU significantly increases data transfer time and consistently reduces jitter.
The TCP/IP is easily integrated alongside other protocols to provide an easy path for the development of TCP enabled FPGA applications.
Key features
- 1 to 256 Simultaneous connections
- Server/Client roles, configurable per connection
- Automatically establish & tear-down connections
- All-RTL send/receive for extremely low latency
- Low-jitter and high sustained throughput performance
- ARP/ICMP layers for complete FPGA hosted application with ARP and ICMP “ping”
- Programmable per connection receive/congestion window
- Monitoring function, per-session statistics
- 64-bit AXI4 Send & Receive streams @ 156.25 MHz
- Internal Block RAM or External DDR3 buffers
- Configurable TX & RX buffer size: 4KiB-2GiB
Block Diagram
10G/ 25G/40G/100Gbit/s TCP/IP block diagram
Applications
- · Artificial Intelligence
- · Machine Learning
- · Video Imaging
- · Image/Signal Processing
- · Internet Security Monitoring
- · Data Storage & Capture Systems
- · Trade Execution & monitoring
- · HPC/ Big Data systems
- · Data Mining
What’s Included?
- · Encrypted compiled netlist
- · Datasheet & User Guide
- · Reference Designs/Examples
- · Simulation Test bench
- · Build scripts for Vivado
- · Software Driver
- · Support for integration into FPGA
Specifications
Identity
Part Number
10G/ 25G/40G/100Gbit/s TCP/IP
Vendor
Chevin Technology Limited
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
UK
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Frequently asked questions about Ethernet IP cores
What is TCP/IP Offload Engine - 10G/ 25G/40G/100Gbit/s TCP/IP?
TCP/IP Offload Engine - 10G/ 25G/40G/100Gbit/s TCP/IP is a Ethernet IP core from Chevin Technology Limited listed on Semi IP Hub.
How should engineers evaluate this Ethernet?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Ethernet IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.