10G/25G/40G/100Gbit/s Ethernet MAC/PCS
Smooth integration of TCP/IP and UDP/IP protocols in your FPGA The 10/25/40/100G MAC IP core is a Low-Latency Ethernet MAC with a…
- Ethernet
- Now
- IEEE 802.3-2008, IEEE 802.3…
Chevin Technology delivers high performance, configurable Ethernet IP Cores for Intel and AMD Xilinx FPGAs. Our goal is to provide reliable, hardware accelerator capabilities for high end FPGAs that are cost effective and straightforward to implement into client’s projects, using a minimum of FPGA resources. Our Ethernet IP cores are developed and comprehensively tested in-house, so we can offer valuable, expert knowledge and responsive engineering support to smooth the path for successful integration into client products.
Chevin Technology’s IP Cores achieve high throughput and sustained data rates to maximise link utilization. The compact, ‘all logic’ architecture requires no CPU/SW, therefore reducing complexity, latency and energy consumption, while leaving maximum space for further design logic on customer FPGAs. Chevin Technology’s Ethernet IP Cores also feature our patented Silicon Software Solution, which provides further design flexibility and cost efficiency, as clients have the option of adding extra features as required throughout the design cycle. Client projects include international defence; medical research, scientific research, industrial imaging, data storage.
10G/25G/40G/100Gbit/s Ethernet MAC/PCS
Smooth integration of TCP/IP and UDP/IP protocols in your FPGA The 10/25/40/100G MAC IP core is a Low-Latency Ethernet MAC with a…
10/25/40/100Gbit/s Ethernet PCS/PMA
Smooth integration of TCP/IP and UDP/IP protocols in your FPGA PGA Synthesisable 10/25/40/100 Gbit/s Ethernet PCS code for ultra-…
UDP/IP Offload Engine - 10G/25G/40G/100Gbit/s Ethernet UDP/IP
Fast, customizable data transfer supported by expert engineering and design services to optimize the performance of your product.
ChevinID™ intelligently identifies malicious or accidental changes that occur during the production process.
TCP/IP Offload Engine - 10G/ 25G/40G/100Gbit/s TCP/IP
Fast, reliable connectivity in any FPGA using a minimum of FPGA resources The TCP/IP (Transmission Control Protocol/ Internet Pro…
HMAC-SHA256 cryptographic accelerator
The HMAC-SHA256 cryptographic accelerator function is used to securely generate and verify message authentication codes.