100M Verification IP
The 100M Ethernet Verification IP provides an effective & efficient way to verify the components interfacing with Ethernet interf…
Overview
The 100M Ethernet Verification IP provides an effective & efficient way to verify the components interfacing with Ethernet interface of an IP or SoC. The 100MG Ethernet VIP is fully compliant with IEEE standard 802.3 specification. This VIP is light weight with easy plug -and- play interface so that there is no hit on the design cycle time.
Key features
- Supports standard MII (Media Independent Interface) interface.
- Supports Full Duplex operation.
- Supports MMD block in all Physical sub-layers.
- Provides STA controller to configure the MMD blocks.
- Supports all types of error injection and detection.
- On-the-fly protocol checking using protocol check functions.
- Performs 4B/5B encoding and 5B/4B decoding.
- Supports Serialization/Deserialization of code groups.
- Supports Mapping of Transmit, Receive, and Carrier Sense mechanisms between MII and PMA.
- Supports block distribution according to Ethernet frame format.
- Performs Clock Data Recovery (CDR) operation on incoming data from below Sub-layer.
- Supports NRZI (Non-Return-to-Zero Inverted) Encoding.
- Supports Fault Detection and Fault Signaling.
- Supports carrier detection and link integrity monitoring.
- Provides configuration in monitor for both error injection and normal test cases.
- Provides scoreboard for endpoint verification.
- Support clock and data recovery for all Phy sublayers.
- Provides local loopback & Remote Loopback to/from the service interfaces.
- Callbacks in RS and Phy layers to provide user control.
- Graphical Protocol layer analyzer shows Ethernet data for easy debugging
Block Diagram
Benefits
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog.
- Unique development methodology to ensure highest levels of quality.
- Availability of various Regression Test Suites.
- 24X5 customer support.
- Unique and customizable licensing models.
- Exhaustive set of assertions and cover points with connectivity example for all the components.
- Consistency of interface, installation, operation and documentation across all our VIPs.
- Provide complete solution and easy integration in IP and SoC environment.
What’s Included?
- 100M Ethernet Master/Slave
- 100M Ethernet BFM/Agents for :
- MAC + RS Layer
- PLS Layer
- PMA Layer
- PMD Layer
- 100M Ethernet Layered Monitor and Scoreboard
- Integration Guide, User Manual and Release Notes
- Test Environment & Test Suite :
- Basic and Directed Protocol Tests
- Random Tests
- Error Scenario Tests
- Coverage Tests
- User Test Suite
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Ethernet IP cores
What is 100M Verification IP?
100M Verification IP is a Ethernet IP core from Truechip Solutions listed on Semi IP Hub.
How should engineers evaluate this Ethernet?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Ethernet IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.