DMA IP cores enable efficient data movement and event handling in embedded systems, reducing CPU load and improving overall SoC performance. These semiconductor IP blocks are widely used in MCUs, processors, multimedia platforms, and real-time control systems.
Compare DMA and interrupt controller IP with configurable channels, low-latency transfers, bus integration, and scalable interrupt management for advanced SoC architectures.
SG DMA Controller, 1-16 DMA Channels, AHB5 Master Interface
The DB-DMAC-MC-AHB5 & DB-DMAC-MC-AHB-Lite Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 1 – 16 independent dat…
The Scatter-Gather DMA Engine Verification IP (VIP) is designed to validate the functionality and performance of scatter-gather D…
LeWiz provides a range of direct memory access controllers (DMA) and bus bridge IP cores.
AHB Single Channel DMA Controller
The AHB Single Channel DMA Controller core is a configurable single channel direct memory access controller.
The Multi-Channel Direct Memory Access (MCDMA) Controller is designed to improve microprocessor system performance by allowing ex…
Direct Memory Access (DMA) is a technique for transferring blocks of data between system memory and peripherals without a process…
AMBA AHB Direct Memory Acess (DMA) Controller
AMBA AHB Direct Memory Acess (DMA) Controller
Peripheral Direct Memory Access Controller
The CC-PDMA-APB-AHB is a synthesisable Verilog model of a peripheral direct memory access controller.
Direct Memory Access Controller
The DDMA is a four-channel Direct Memory Access Controller.
AHB Scatter-Gather DMA Controller
The eSi-SG-DMA core can be used to implement 1D and 2D memory-to-memory, memory-to-peripheral, peripheral-to-memory and periphera…
AHB Single Channel DMA Controller
The DMA is a configurable single channel direct memory access controller.
DTI_DMA control the DMA transfers data between different points in the memory space without intervention of the CPU.
Direct Memory Access Controller
The uDMA (Micro Direct Memory Access) controller serves as a hardware approach for direct data transfers between peripherals/memo…
Data Movement Engine - Turnkey network compute subsystem for data movement applications.
Physical AI platforms interpret their surroundings using a diverse array of sensors, generating data that must be seamlessly tran…
Direct memory access (DMA) controller
The Arm CoreLink DMA-350 direct memory access (DMA) controller offloads memory movement tasks from the CPU to improve system perf…
The AXI MCDMA facilitates large data migration, offloading the task from the embedded processor.
The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP core that provides high-bandwidth direct memory access bet…
The AXI Direct Memory Access (AXI DMA) IP provides high-bandwidth direct memory access between memory and AXI4-Stream-type target…
The Xilinx LogiCORE™ IP AXI Central Direct Memory Access (CDMA) core is a soft Xilinx Intellectual Property (IP) core for use wit…
The AXI BRAM Controller is a soft Xilinx IP core for use with the Xilinx Embedded Development Kit (EDK) and Vivado™ IP Integrator…