Vendor: Nuclei System Technology Category: DMA

Direct Memory Access Controller

The uDMA (Micro Direct Memory Access) controller serves as a hardware approach for direct data transfers between peripherals/memo…

Overview

The uDMA (Micro Direct Memory Access) controller serves as a hardware approach for direct data transfers between peripherals/memory and memory without CPU intervention, targeting to off-load CPU from transferring big data chunks where required.

Key features

  • Support up to 8 mem2mem channels with software configurable priority
  • Support up to 32 peripheral channels for pa-mem transfers
  • Support up to 16 (peripheral closely coupled) PER-type of memory-peripheral transfers
  • Support memory access with 1-16 beat(s) incrementing burst type
  • Support configurable data width 8, 16, 32, 64 bits for memory access(depending on data bus width)
  • Support fixed or increasing address generation algorithm
  • Support m2m continuous or repeat configurable-N times transfer mode
  • Support independent source and destination base address setting, byte, half-word or word aligned
  • Support arbitrary transfer block size within (1M-1) bytes
  • Support interrupt generation, masking and clearing

Specifications

Identity

Part Number
DMA
Vendor
Nuclei System Technology
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about DMA IP core

Frequently asked questions about DMA IP

What is Direct Memory Access Controller?

Direct Memory Access Controller is a DMA IP core from Nuclei System Technology listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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