Vendor: Lattice Semiconductor Corp. Category: DMA

Multi-channel DMA Controller

The Multi-Channel Direct Memory Access (MCDMA) Controller is designed to improve microprocessor system performance by allowing ex…

Overview

The Multi-Channel Direct Memory Access (MCDMA) Controller is designed to improve microprocessor system performance by allowing external devices to directly transfer information from the system memory. Memory-to- memory transfer capability is also supported.

The MCDMA Controller core supports two modes: 8237 and non-8237. When the 8237 mode is selected, it configures the core to be compatible with the Intel 8237A DMA Controller with a few variations. These variations are listed in the "Compatibility Differences with the 8237 Intel Device" section of the datasheet. The 8237 mode supports four independent channels while the non-8237 mode supports up to 16 independent channels.

Key features

  • Selectable 8237 Mode
  • Configurable up to 16 Independent DMA Channels for Non-8237 Mode
  • Configurable Data Width of 8, 16, 32 or 64 Bits for Non-8237 Mode
  • Configurable Address Width of 16, 24 or 32 Bits for Non-8237 Mode
  • Configurable Word Count Register Width for Non-8237 Mode
  • Independent Auto-initialization of All Channels
  • Memory-to-Memory Transfers on Single, Block, and Demand Transfer Modes
  • Memory Block Initialization
  • Software DMA Requests

Block Diagram

Specifications

Identity

Part Number
DMA-MC
Vendor
Lattice Semiconductor Corp.
Type
Silicon IP

Files

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Provider

Frequently asked questions about DMA IP

What is Multi-channel DMA Controller?

Multi-channel DMA Controller is a DMA IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.

How should engineers evaluate this DMA?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DMA IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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