Overview
Complex system-on-chip (SoC) requirements can include security at the MAC layer, VPN layer, and application layer. The SynopsysSecurity Protocol Accelerator (SPAcc) IP addresses these needs with support for the Wi-Fi, MACsec, IPsec, SSL/TLS/DTLS, and SRTP security standards. The SPAcc
IP offers high throughput with support for mixed packet size traffic and low latency to preserve quality of service in voice and video applications in single- and multi-core processor architectures. The product is a highly customer configurable enabling solution to be tuned for specific applications providing differentiation in the market.
The Synopsys SPAcc optionally includes the following cryptographic support:
• 3GPP/LTE/LTE-Advanced wireless security: ZUC, SNOW 3G and KASUMI algorithms
• Chinese security: SM3 and SM4 algorithms
• DPA/TA side channel countermeasures: for AES, SM4, DES/3DES algorithms
Learn more about IPsec / TLS IP core
Recognition highlights leadership in agentic AI design, advanced-node enablement, co-packaged optics, and silicon-proven IP for next-generation AI systems
Leading portfolio of engineering solutions positions Synopsys to capitalize on the continued expansion of digital and physical AI and the AI-driven transformation of engineering.
The companies signed an expansive, multi-year agreement to jointly develop GPT-Synopsys, a specialized model, optimized to use Synopsys EDA tools to perform semiconductor design workflows.
The multi-year agreement marks the expansion of Synopsys' silicon IP business to serve increasing demand for application-optimized IP with Amazon as its lead customer.
Open and Secure Synopsys Autopilot Platform Accelerates Engineering Productivity, Improves Design Quality, and Achieves Faster Closure Across Silicon to Systems
New collaborations span A14 design enablement, AI-assisted engineering workflows, CoWoS® support for multi-die designs, and unified multiphysics signoff