Secure Hash Algorithm 512 IP Core

A universal solution that effectively accelerates the SHA2-512 hash function complying with FIPS PUB 180-4 is the SHA2-512 bridge to APB, AHB, and AXI bus. It computes the message digest in four different bit modes: 256, 224, 384, or 512. A message length of up to 264 +/- 1 bit may be entered. It also natively supports the SHA2-512 HMAC (Keyed-Hash Message Authentication Code), a cryptographic mechanism defined in RFC 2104. This depends on the core settings. This IP is appropriate for secure communication in general as well as digital signature techniques that need authentication and data integrity verification. It may also be applied to speed up calculations related to cryptocurrencies.

It provides a functionality for switching between contexts, which might be useful in intricate systems when a job has a preemption mechanism. Custom HMAC schemes or software management are its other applications.

• FIPS PUB 180-4 compliant SHA2-512 function
• RFC 2104 compliant HMAC mode native support
• SHA2 224, 256, 384, 512-bit modes support
• Secure storage for precomputed HMAC keys
• Hash/HMAC context swapping
• Internal, automatic padding module
• Binary message resolution support
• Flexible data read/write modes
• Software driver with OpenSSL/MbedTLS interface ready
• Available system interface wrappers:
• AMBA – APB / AHB / AXI Bus
• Altera Avalon Bus
• Xilinx OPB Bus

• Digital signature
• Data integrity
• Key derivation
• TLS/SSH/PGP IPsec communication

• Source code:
• VERILOG test bench environment
• Technical documentation
• Synthesis scripts
• Example application Technical support
• IP Core implementation support
• 12 months of maintenance