Implementation of the WLAN security standard (802.11i) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
- MACsec
Security IP cores provide the hardware foundation required to protect modern SoC and ASIC designs against an increasingly sophisticated threat landscape. They enable secure data processing, trusted device operation, intellectual property protection, and compliance with industry security standards.
This category includes a comprehensive range of security technologies, from cryptography engines for encryption, decryption, hashing, and authentication, to interface security solutions that protect data in transit. It also covers key management IP for secure key generation and storage, root of trust implementations that establish a trusted security foundation, secure processing architectures for isolated execution of sensitive workloads, and side-channel protection technologies designed to mitigate power, timing, electromagnetic, and fault-injection attacks.
This catalog allows you to explore and compare Security IP cores from leading vendors based on security capabilities, performance, certification readiness, attack resistance, silicon maturity, and process node compatibility.
Whether you are developing connected IoT devices, automotive platforms, industrial equipment, consumer electronics, networking infrastructure, or cloud and edge computing systems, you can identify the security IP solutions needed to build resilient and trustworthy semiconductor products.
Implementation of the WLAN security standard (802.11i) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a.
SHA1, SHA2 Cryptographic Hash Cores
The SHA cores provide implementation of cryptographic hashes SHA-1 (core SHA1), SHA-2 (cores SHA2-256 and SHA2-512).
HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol.
SSL/TLS Processor IP Core with an AXI Bus Interface
The SSL1 core implements SSL and/or TLS frameworks with a configurable variety of cipher suites.
True Random and Pseudorandom Number Generator
The true random generator core implements true random number generation.
The CRYPT-IP-120 combines local key storage, an AES cipher (AES-IP-39), a SHA-2 hash (HASH-IP-57) and DMA capability into an easy…
The ZUC-IP-48 (EIP-48) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as sp…
AES Encryption & Decryption IP Core − Programmable Block Cipher Modes
The AES-P IP core implements the FIPS-197 Encryption Standard.
SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2…
The Kasumi-IP-06 (EIP-06) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as…
SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algor…
Flexible and Silicon proven Ethernet Layer 2 Security solution The MACsec IP provides Ethernet Layer 2 Security for port authenti…
Multi-2 Descrambler Supporting BCAS for ISDB-T,TMM in Japan
MEGACAST MULTI2 IP core implements the MULTI2 encryption/decryption algorithms as specified by ISO9979/0009 algorithm register en…
This is a pipelined high throughput AES core capable of starting a new encryption every clock cycle.
RSA public key cryptography with APB interface
The standard RSA module is available as an APB peripheral, where it seamlessly integrates with EnSilica's cryptography library.
The RC4 core implements the RC4 stream cipher in compliance with the ARC4 specification.
High-Performance Lossless Compression/Encryption Combo Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from …
This is a high performance pipelined implementation of AES optimized for encryption of uncompressed video on low cost FPGA famili…
The Helion SNOW3G core efficiently implements the stream cipher used as the basis for the UEA2 confidentiality algorithm and UIA2…
The AES-IP-39 (EIP-39) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting all NIST modes including …