AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Encryption Standard (AES) specification in "F…
- AES
Security IP cores provide the hardware foundation required to protect modern SoC and ASIC designs against an increasingly sophisticated threat landscape. They enable secure data processing, trusted device operation, intellectual property protection, and compliance with industry security standards.
This category includes a comprehensive range of security technologies, from cryptography engines for encryption, decryption, hashing, and authentication, to interface security solutions that protect data in transit. It also covers key management IP for secure key generation and storage, root of trust implementations that establish a trusted security foundation, secure processing architectures for isolated execution of sensitive workloads, and side-channel protection technologies designed to mitigate power, timing, electromagnetic, and fault-injection attacks.
This catalog allows you to explore and compare Security IP cores from leading vendors based on security capabilities, performance, certification readiness, attack resistance, silicon maturity, and process node compatibility.
Whether you are developing connected IoT devices, automotive platforms, industrial equipment, consumer electronics, networking infrastructure, or cloud and edge computing systems, you can identify the security IP solutions needed to build resilient and trustworthy semiconductor products.
AES IP Core is a Secure Symmetric Block Cipher IP Core that has compliance with the Encryption Standard (AES) specification in "F…
The Synopsys ARC® SEM Family of performance-efficient, ultra-low power, compact security processors enables designers to integrat…
Common public key algorithms include RSA, Digital Signature Algorithm (DSA), and Diffie-Hellman (DH), which require the calculati…
128-bit Public Key Accelerator
Common public key algorithms include RSA, Digital Signature Algorithm (DSA), and Diffie-Hellman (DH), which require the calculati…
Highly configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems
configurable HW Lattice PQC ultra acceleration in AXI4 & PCIe systems – from Core to Multi-instance Manager with Queuing or Strea…
Single instance HW Lattice PQC ultra accelerator
Single instance HW Lattice PQC ultra accelerator as an AXI subordinate PQPerform-Flare is a hardware-based FIPS 140-3 CAVP-certif…
Fast Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium) with DPA
The Quantum Safe Engine (QSE) IP provides Quantum Safe Cryptography acceleration for ASIC, SoC and FPGA devices.
When safety & security meet the best size/performance ratio… ECDSA IP Core Elliptic curves form the foundation of cutting-edge pu…
Elliptic curves form the foundation of cutting-edge public-key cryptography, serving as a crucial component for secure digital si…
Configurable Root-of-Trust Security for Every Level of Assurance
Robust, hardware-based security IP for advanced semiconductor devices—protecting every stage from initial design to deployment and beyond.
External NOR flash protection solution that supports real-time decryption and execution in place
The Flash Protection Series is a suite of enhancements available for PUFcc and PUFrt, extending the Hardware Root of Trust to pro…
External NAND flash protection, designed to secure stored assets with a local key from PUF
The Flash Protection Series is a suite of enhancements available for PUFcc and PUFrt, extending the Hardware Root of Trust to pro…
VISENGI's SHA-2 Secure Hash Algorithm IP core has been developed to be the highest throughput SHA-2 cryptographic hasher while at…
Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
The ICE-IP-338 (EIP-338) Inline Cipher Engine is a scalable, high-performance, multi-stream inline cryptographic engine that offe…
AES Authenticated Encryption Accelerator with DPA or with DPA and FIA
The SCA-resistant AES-IP-3X family of crypto accelerator cores provide semiconductor manufacturers with superior AES cipher accel…
The AES engine IP is a high-performance cryptographic engine operates in AES NIST Federal information processing standard FIPS-19…
HDCP Encryption-Decryption Engine
The Trilinear Technologies High-bandwidth Digital Content Protection (HDCP) Encryption Decryption Engine IP core implements the H…
The Secure Debug IP provides isolation between 2 domains.
Embedded Flash Protection with Hardware Root of Trust and Lite Crypto Engine
The Flash Protection Series is a suite of enhancements available for PUFcc and PUFrt, extending the Hardware Root of Trust to pro…
PUFcc is a novel high-security Crypto Coprocessor.