High-Performance Lossless Compression/Encryption Combo Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from …
- Symmetric Crypto
Cryptography IP cores provide hardware-based security functions for protecting data, communications, and digital assets in modern SoC and ASIC designs. By offloading cryptographic operations from software, these IP cores deliver higher performance, lower latency, improved energy efficiency, and stronger resistance to security attacks.
This category includes Symmetric Cryptography, Public Key Cryptography, Post-Quantum Cryptography (PQC), Hash / MAC, and Random Number Generator (RNG) IP solutions. Available implementations may support algorithms such as AES, ChaCha20, RSA, ECC, ML-KEM, ML-DSA, SHA-2, SHA-3, HMAC, CMAC, and true or deterministic random number generation technologies required for secure key management and authentication.
This catalog enables semiconductor engineers to evaluate and compare Cryptography IP from leading vendors based on supported algorithms, security certifications, throughput, latency, power consumption, silicon area, side-channel resistance, quantum-safe capabilities, and semiconductor process node compatibility.
High-Performance Lossless Compression/Encryption Combo Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from …
This is a high performance pipelined implementation of AES optimized for encryption of uncompressed video on low cost FPGA famili…
The Helion SNOW3G core efficiently implements the stream cipher used as the basis for the UEA2 confidentiality algorithm and UIA2…
The AES-IP-39 (EIP-39) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting all NIST modes including …
The AES-IP-37 (EIP-37) is IP for accelerating the AES Key Wrap cipher algorithm (NIST-Key-Wrap & RFC3394) up to 6 Gbps.
This hardware IP core features a full Secure Hash Algorithm SHA1.
Common Scrambling Algorithm IP core
The Helion DVB-CSA cores implement the ETSI specified Common Scrambling Algorithm (CSA) which is used to provide the conditional …
The MW_AES core performs the digital baseband function that can be used to protect electronic data.
GCM-AES IP Core − Authenticated Encryption & Decryption
The AES-GCM128 IP core implements the GCM-AES authenticated encryption and decryption, as specified in the NIST SP800-38D recomme…
AES Encryption & Decryption IP Core − Single Configurable Block Cipher Mode
The AES-C IP core implements the FIPS-197 Encryption Standard.
The SHA256 IP core from Alma Technologies is a high performance implementation of the SHA-256 Message Digest algorithm, a one-way…
The SHA1 IP core is a high performance implementation of the SHA-1 Message Digest algorithm, a one-way hash function, compliant w…
MD5 IP Core Message Digest Function
The MD5 IP core is a high-performance implementation of the MD5 Message-Digest algorithm, a one-way hash function, compliant to t…
AKW1 implements the NIST standard AES key wrap and unwrap.
Ultra-Compact Data Encryption Standard (DES/3DES) Core
The DES1 ASIC/FPGA core is an implementation of the DES and triple DES encryption and decryption in compliance with the NIST Data…
SHA-1 Secure Hashing Algorithm
The Secure Hashing Algorithm (SHA-1) core was implemented in compliance with Federal Information Processing Standards (FIPS) Publ…
AES-GCM MACsec (IEEE 802.1AE) and FC-SP Cores
Implementation of the new LAN security standard 802.1ae (MACSec) requires the NIST standard AES cipher in the GCM mode for encryp…
The AES-IP-36 (EIP-36) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting ECB, CBC and CTR modes up…
ARC4 Stream Cipher Accelerators
The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5 Gbps @ 600M…
AES-CCM is an authenticated encryption block cipher mode which provides data confidentiality, integrity and origin authentication…