Vendor: VISENGI Category: Hash / MAC

Secure Hash Algorithm SHA1

This hardware IP core features a full Secure Hash Algorithm SHA1.

SHA1 View all specifications

Overview

This hardware IP core features a full Secure Hash Algorithm SHA1.

Key features

  • SHA-1 Secure Hash as defined in latest FIPS PUB 180-3.
  • Compatible HMAC for Hash Message Authentication as per FIPS PUB 198.
  • Fully verified with NIST test vectors.
  • Power aware design with power off function.
  • Minimum latency: 84 cycles per block of 512 bits.
  • Continuous operation, no wait cycles needed.
  • Fastest thoughput: hash up to 2.5 Gbps in a Virtex-5 FPGA (414 MHz).

What’s Included?

  • Full technical support up to successful client integration
  • Documentation and design examples
  • Complete Testbench
  • Instantation Template

Specifications

Identity

Part Number
SHA-1
Vendor
VISENGI
Type
Silicon IP

Security

Crypto Algorithm
SHA1

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

VISENGI
HQ: Spain

Learn more about Hash / MAC IP core

VISENGI Announces 8K30 capable H.264 Encoder on Zynq-7030

VISENGI unveiled on September 30th at Altera SoC Developer Forum in Santa Clara, California, the availability of the smallest 8K H.264 Encoder in the market, capable of delivering 8K 25 fps on the mid-range Altera Arria 10 FPGAs, and now an overwhelming 8K 30 fps on the small and low-cost Xilinx Zynq-7030 FPGA.

Frequently asked questions about Hash / MAC IP cores

What is Secure Hash Algorithm SHA1?

Secure Hash Algorithm SHA1 is a Hash / MAC IP core from VISENGI listed on Semi IP Hub.

How should engineers evaluate this Hash / MAC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Hash / MAC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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