SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2…
- SHA1 + 2
Hash / MAC IP cores implement hardware-based cryptographic functions for trusted SoC and ASIC architectures in modern SoC and ASIC designs.
These IP cores support integrity protection, authentication, and digest generation for secure computing systems, helping designers improve security throughput, reduce CPU overhead, and strengthen system trust anchors
This catalog allows you to compare Hash / MAC IP cores from leading vendors based on security level, throughput, power efficiency, and process node compatibility.
Whether you are designing secure protocols, firmware verification, data integrity, or trusted systems, you can find the right Hash / MAC IP for your application.
SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2…
SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algor…
This hardware IP core features a full Secure Hash Algorithm SHA1.
The SHA256 IP core from Alma Technologies is a high performance implementation of the SHA-256 Message Digest algorithm, a one-way…
The SHA1 IP core is a high performance implementation of the SHA-1 Message Digest algorithm, a one-way hash function, compliant w…
MD5 IP Core Message Digest Function
The MD5 IP core is a high-performance implementation of the MD5 Message-Digest algorithm, a one-way hash function, compliant to t…
SHA-1 Secure Hashing Algorithm
The Secure Hashing Algorithm (SHA-1) core was implemented in compliance with Federal Information Processing Standards (FIPS) Publ…
The Helion Fast Hash core family implements the NIST approved SHA-1, SHA-256, SHA-384 and SHA-512 secure hash algorithms to FIPS …
The Helion Tiny Hash Core family for ASIC offers a combination of high functionality and low resource usage for lower data rate a…
Security Hash, SM3 Hash and HMAC Engine
The hash processor is a fully compliant implementation of the secure hash algorithm (SHA-1, SHA-224, SHA-256, SHA-384, SHA-512), …
Standalone stateful hash-based signatures software library
The SHSlib is a standalone stateful hash-based signatures software library, which provides signature verification for stateful ha…
SHA-256 IP is an optimized and efficient implementation of a secure hash algorithm SHA-256 specified in FIPS 180-4 standard.
HMAC-SHA256 cryptographic accelerator
The HMAC-SHA256 cryptographic accelerator function is used to securely generate and verify message authentication codes.
SHA-384 and SHA-512 Secure Hash Crypto Engine
The SHA-384/512 is a high-throughput, and compact hardware implementation of the SHA-384 and the SHA-512 cryptographic hash funct…
The Beyond SHA-3 is a high-throughput, area-efficient hardware implementation of the SHA-3 cryptographic hashing functions, compl…
SHA-3 Secure Hash Crypto Engine
The SHA-3 is a high-throughput, area-efficient hardware accelerator for the SHA-3 cryptographic hashing functions, compliant to N…
256-bit SHA Secure Hash Crypto Engine
The SHA-256 encryption IP core is a fully compliant implementation of the Message Digest Algorithm SHA-256.
Message Digest Algorithm Processor
The MD5 encryption IP core is a fully compliant hardware implementation of the Message Digest Algorithm MD5, suitable for a varie…
The SHA-3 module implements the SHA3-512, SHA3-384, SHA3-256 and SHA3-224 hash algorithms and the SHAKE128 and SHAKE256 extendabl…
SHA-512, SHA-384, SHA512/256 and SHA-512/224
The SHA-512 module implements the SHA-512, SHA-384, SHA-512/256 and SHA-512/224 hash algorithms specified in FIPS PUB 180-4, the …