Secure Hash Algorithm-3 (SHA-3)
CYB- SHA3 implements Secure Hash Algorithm-3 (SHA-3) family of functions on binary data with the NIST FIPS 202 Standard.
- SHA3
Hash / MAC IP cores implement hardware-based cryptographic functions for trusted SoC and ASIC architectures in modern SoC and ASIC designs.
These IP cores support integrity protection, authentication, and digest generation for secure computing systems, helping designers improve security throughput, reduce CPU overhead, and strengthen system trust anchors
This catalog allows you to compare Hash / MAC IP cores from leading vendors based on security level, throughput, power efficiency, and process node compatibility.
Whether you are designing secure protocols, firmware verification, data integrity, or trusted systems, you can find the right Hash / MAC IP for your application.
Secure Hash Algorithm-3 (SHA-3)
CYB- SHA3 implements Secure Hash Algorithm-3 (SHA-3) family of functions on binary data with the NIST FIPS 202 Standard.
High-Performance SHA-2/HMAC Accelerator with Full SHA-2 Family Support and Low Latency SCA/FI Protection FortifyIQ’s SHA-2/HMAC I…
HMAC-SHA256 Secure Core - Hardware Accelerator for SHA-2 and HMAC with Low Latency SCA/FI Protection
Hardware Accelerator for SHA-2 and HMAC with Low Latency SCA/FI Protection FortifyIQ’s SHA-2/HMAC IP core delivers high-speed, ha…
SHA256 is a Secure Hash Algorithms which is one of the latest hash functions standarized by the U.S Federal Government.
SM3 is a hash algorithm initially published by the Office of State Commercial Cryptography Administration (OSCCA) of SCA in 2010,…
HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
This is a high performance, small footprint HASH IP Core.
The eSi-SHA256 core is an easy to use SHA hash accelerator peripheral for both SHA256 and SHA224.
The eSi-SHA1 core is an easy to use SHA1 hash accelerator peripheral.
SHA IP Core with native SHA2-256 HMAC support
The DSHA2-256 is a universal solution which efficiently accelerates SHA2-256 hash function compliant with FIPS PUB 180-4.
An n-bit hash is a map from arbitrary length messages to n-bit hash values.
This core is a fully compliant implementation of the Message Digest Algorithm SHA-256.
This core is a fully compliant implementation of the Message Digest Algorithm MD5.
This core is a fully compliant implementation of the Secure Hash Algorithm, SHA-1.
The Keccak IP core supports Keccak-based hash functions, including the SHA3 and SHAKE families.
SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIP…
VISENGI's SHA-2 Secure Hash Algorithm IP core has been developed to be the highest throughput SHA-2 cryptographic hasher while at…
The eSi-SHA512 core is an easy to use SHA hash accelerator peripheral for both SHA512 and SHA384.
600Mb/s Authentication IP Core for AXI-4 Streams Optimized for Area MD5 Stream Authentication IP Cores converts streams of data i…
SHA1, SHA2 Cryptographic Hash Cores
The SHA cores provide implementation of cryptographic hashes SHA-1 (core SHA1), SHA-2 (cores SHA2-256 and SHA2-512).
The CRYPT-IP-120 combines local key storage, an AES cipher (AES-IP-39), a SHA-2 hash (HASH-IP-57) and DMA capability into an easy…