DisplayPort 1.4a / eDP 1.4b RX PHY and Controller IP
Comprehensive transmitter solution compliant with VESA DisplayPort 1.4a and Embedded DisplayPort (eDP) 1.4b standards
- Controller + 1
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
DisplayPort 1.4a / eDP 1.4b RX PHY and Controller IP
Comprehensive transmitter solution compliant with VESA DisplayPort 1.4a and Embedded DisplayPort (eDP) 1.4b standards
Aurora 64B/66B is a lightweight and open protocol suitable for chip-to-chip, board-to-board and backplane applications using very…
10/100/1000 base T ethernet Phy
IP
PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection
M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support
M31 USB4 Gen3x2 transceiver IP provides a range of USB4 Gen3x2 host and peripheral applications up to 40Gbps.
10Base-T/100Base-TX Fast Ethernet PHY
10Base-T/100Base-TX Fast Ethernet PHY
SDI Mapper for TICO-RDD35 & TicoXS (JPEGXS) lightweight codecs
Extend 4K or 8K using today's deployed HD-SDI/3G-SDI systems The IPX-SDI-MAP IP-cores enable to efficiently transport TICO RDD35 …
PCIe Multi-Function Option for DMA IP Cores
The PCI Express specification allows endpoints that incorporate several physical PCIe functions that share the same PCIe connecti…
CAN FD Controller DO-254 IP Core
The CAN FD Controller implements a Controller Area Network as specified in the ISO 11898:2015 Part 1, supporting both Classical a…
The Foresys MIPI CSI2 Tx Core provides a fast path to integrating Image Sensors into a wide variety of products based on Altera d…
The Foresys MIPI Core provides a fast path to integrating Image Sensors or other MIPI connected devices into a wide variety of pr…
Low-Latency IP 10G Ethernet MAC
LeWiz makes available its ultra low-latency 10G Ethernet MAC for IP licensing - targeting low-latency applications such as those …
The AXI2APB implements a bridge between AXI and APB buses, allowing the connection of peripherals with an APB interface to an AXI…
The AXI-MLIC is an AMBA® AXI bus interconnect fabric connecting an arbitrary number of bus masters to an arbitrary number of slav…
The AHB-MLIC is a multi-layer AMBA® AHB bus fabric connecting an arbitrary number of bus masters to an arbitrary number of slaves.
The AXI-SBS is an integrated, verified, AMBA® compliant hardware/software system ready for embedded applications using processors…
The AHB-SBS is an integrated, verified, AMBA® 3.0 interconnect and peripherals subsystem ready for embedded applications using pr…
The APB-SBS subsystem integrates typical microcontroller peripherals connected on the an AMBA® APB bus with a bridge to AHB or AX…
Protocol controller IP for Classical CAN / CAN FD / CAN XL
The X_CAN is the new CAN Communication Controller IP supporting CAN XL protocol.
The multi-channel, multi-speed Ethernet universal media access control (MAC) and physical coding sublayer IP (UMAC) is fully conf…