DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices.
- I2S
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices.
DTI I2C Controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated …
Software Defined Radio for High Throughput PTP and PTMP network communication
This SDR is targeted for data communication where secure point-to-point to multi-point links are established that mostly finds it…
Mini LVDS Transmitter
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Aliathon’s 100GE-OTU4 transponder is targeted towards packet optical transport in the OTN network.
Aliathon’s 10 x 10G muxponder is targeted towards the long haul OTN transport of 10G clients.
100G OTN Regenerator/Repeater(OTL4.4)
Aliathon’s 100GE-OTU4 regenerator/ repeater is targeted towards long haul transport in the OTN network.
Aliathon’s 100G add/drop multiplexor is targeted towards the next generation metro ring topologies for OTN.
Aliathon Ltd.
QDMA Subsystem for PCI Express
The Xilinx® LogiCORE™ QDMA for PCI Express® (PCIe) implements a high performance, configurable Scatter Gather DMA for use with th…
The ETRNIC (Xilinx Embedded Target RDMA enabled NIC) IP is a target only implementation of RDMA over Converged Ethernet (RoCE v2)…
Xilinx Interlaken IP core is based on Sarance Technologies Best-In-Class Intellectual Property Interlaken is a scalable chip-to-c…
The 400G High Speed Ethernet (400G HSEC) Subsystem provides the 400G Ethernet Media Access Control (MAC) with a Physical Coding S…
The Universal Serial 10GE Media Independent Interface (USXGMII) IP core implements an Ethernet Media Access Controller (MAC) with…
The Xilinx® 10G Ethernet TSN solution provides a 10 Gigabit per second (Gbps) Ethernet Media Access Controller integrated with a …
AXI Bus Functional Model (BFM)
The ability to purchase AXI BFM has been discontinued as of December 1, 2016.