The MW_HPS (Hardware IP Protocol Stack) is the perfect solution for conversion of high speed local interfaces (e.g.
- Protocol Bridge
- Compliant to ATSC Standard …
Protocol Bridge IP cores enable communication between subsystems inside complex SoCs and ASICs in modern SoC and ASIC designs.
These IP cores support translation between on-chip communication standards and subsystem interfaces within heterogeneous architectures, helping designers scale internal bandwidth, subsystem interoperability, and architectural flexibility
This catalog allows you to compare Protocol Bridge IP cores from leading vendors based on bandwidth, latency, scalability, and process node compatibility.
Whether you are designing mixed-protocol SoCs, legacy-to-modern integration, controller fabrics, or subsystem interconnects, you can find the right Protocol Bridge IP for your application.
The MW_HPS (Hardware IP Protocol Stack) is the perfect solution for conversion of high speed local interfaces (e.g.
AXI2CHI · CHI-AXI · CHI-CPI · AXI4-SFI
SmartDV’s CHI to UCIe Bridge IP enables seamless protocol translation between Arm’s Coherent Hub Interface (CHI) and the Universa…
A integrated hardware and software solution that includes a TSN-capable Ethernet switch, a DMA engine, an IEEE 802.1 AS Time Sync…
The I²C slave to AHB bridge core is a I²C slave that provides a link between the I²C bus and AMBA AHB.
The SPI to AHB bridge is an SPI slave that provides a link between a SPI bus (that consists of two data signals, one clock signal…
Siemens EDA* AXI Verification IP Suite
The Siemens EDA AXI Verification IP Suite (Intel® FPGA Edition) provides bus functional models (BFMs) to simulate the behavior an…
The PLUG module is a silicon-proven AXI-to-AXI bridge designed to provide data encryption and inline ECC for reliable and secure …
AMBA AXI - Validates AXI interface functionality, performance, and compliance
The AMBA AXI Verification IP from XtremeSilica is a tool designed to validate the functionality, performance, and protocol compli…
AMBA APB - Validates low-power, low-bandwidth peripheral communication in SoCs
The AMBA APB Verification IP ensures accurate communication and protocol compliance for low-power, low-bandwidth peripherals in S…
AMBA AHB - Validates AHB protocol functionality, performance, and compliance
The AMBA AHB Verification IP validates system-level communication and functionality in SoCs using the AHB protocol.
This Cadence® Verification IP (VIP) provides support for the TileLink specification.
In production since 2011.
In production since 2011 for dozens of designs.
The Cadence® Verification IP (VIP) for SWD provides support for the Serial Wire Debug protocol which is part of the Arm® Debug In…
Simulation VIP for AMBA Stream
Cadence provides a mature and comprehensive Verification IP (VIP) for the AXI4-Stream specification which is part of the Arm® AMB…
Best-in-class Arm® AMBA® LTI Verification IP (VIP) for your IP, SoC, and system-level design testing.Cadence provides a mature an…
Cadence provides a mature and comprehensive Verification IP (VIP) for the LPI specification which is part of the Arm® AMBA® famil…
Cadence provides a mature and comprehensive Verification IP (VIP)for theDistributed Translation Interface (DTI) specification, wh…
Cadence provides a mature and comprehensive Verification IP (VIP) for the AXI specification which is part of the Arm® AMBA® famil…