The LogiCORE™ IP AXI4-Lite IP Interface (IPIF) is a part of the Xilinx family of ARM® AMBA® AXI control interface compatible prod…
- Protocol Bridge
Protocol Bridge IP cores enable communication between subsystems inside complex SoCs and ASICs in modern SoC and ASIC designs.
These IP cores support translation between on-chip communication standards and subsystem interfaces within heterogeneous architectures, helping designers scale internal bandwidth, subsystem interoperability, and architectural flexibility
This catalog allows you to compare Protocol Bridge IP cores from leading vendors based on bandwidth, latency, scalability, and process node compatibility.
Whether you are designing mixed-protocol SoCs, legacy-to-modern integration, controller fabrics, or subsystem interconnects, you can find the right Protocol Bridge IP for your application.
The LogiCORE™ IP AXI4-Lite IP Interface (IPIF) is a part of the Xilinx family of ARM® AMBA® AXI control interface compatible prod…
The Xilinx® LogiCORE™ AXI AMM Bridge IP core connects Avalon bridge slave IPs with AXI interface masters.
AMBA AHB is a bus interface designed for high-performance synthesizable applications.
The " extensible interface" (AXI) bus is a high-performance parallel bus that connects on-chip peripheral circuits (or IP blocks)…
LogiCore AXI to AHB-Lite Bridge IP
Included at no additional charge with Vivado Design and System edition of software.
AXI4-Stream Accelerator Adapter
The AXI4-Stream Accelerator Adapter is a soft Xilinx® LogiCORE™ Intellectual Property (IP) core used as a infrastructure block fo…
The AXI4-Stream Protocol Checker core monitors AXI4-Stream interfaces for protocol violations and provides an indication of which…
The AXI Protocol Checker core is designed to monitor AXI interfaces.
PCI - AMBA AHB Device/Host Bridge
This PCI Host Bridge IP core enables data transfers between an AMBA® AHB host processor bus system and PCI bus based devices.
This PCI Host Bridge IP core enables data transfers between an AMBA® AHB host processor bus system and PCI bus based devices.
HyperLink High Speed DSP Interface Core
The Integretek HyperLink Core allows the creation of a user defined system which can communicate with remote TI Cx66 DSP devices …
Zynq Bus Functional Model (BFM)
The ability to purchase Zynq BFM has been discontinued as of December 1, 2016.
The AMBA® ( Microcontroller Bus Architecture) AHB-Lite ( High Performance Bus) to AXI ( extensible interface) bridge translates A…
The Processor Local Bus (PLB v4.6) to AMBA® ( Microcontroller Bus Architecture) eXtensible Interface (AXI) Bridge translates PLBV…
The LogiCORE® IP AXI Slave Burst is an interface between the AXI4 memory-mapped interface to the IPIC (IP Inter Connect).
The Microcontroller Bus Architecture (AMBA®) eXtensible Interface (AXI4) to Processor Local Bus (PLB v4.6) Bridge translates AXI …
The axi2axi_connector is a utility module for use in EDK to cascade two AXI Interconnect modules.
The AXI ( eXtensible Interface) to APB ( Peripheral Bus) Bridge translates AXI4-Lite transactions into APB transactions.
PLBv46 Endpoint Bridge for PCI Express
The PLBv46 Endpoint is an interface between the Processor Local Bus (PLB) and the PCI Express (PCIe®) silicon hard core.
The PLBV46 Master Burst is a continuation of the Xilinx family of IBM CoreConnect compatible LogiCORE™ products.