MIPI SPMI Post Silicon Validation IP (MIPI SPMI Protocol Analyzer And Exerciser) provides a smart way to post silicon validation …
- Verification IP
Multimedia Interface IP cores provide the high-speed connectivity technologies required to transport video, audio, image, and display data across modern SoCs, ASICs, and electronic systems. These interfaces are essential for enabling seamless communication between processors, cameras, displays, sensors, and multimedia subsystems.
This category includes HDMI, DisplayPort, MIPI, V-By-One, and VESA DSC (Display Stream Compression) IP solutions. Available implementations may include controllers, PHYs, protocol stacks, bridge solutions, and complete subsystem IP supporting high-resolution displays, camera interfaces, video transport, display compression, and multimedia data exchange.
Compare multimedia interface IP cores by protocol standard, feature set, implementation model, and vendor offering to support your video, display, and media connectivity roadmap.
MIPI SPMI Post Silicon Validation IP (MIPI SPMI Protocol Analyzer And Exerciser) provides a smart way to post silicon validation …
VDC-M ENCODER core is compliant with standard VESA Display Stream Compression version 1.1/1.2.
VDC-M DECODER core is compliant with standard VESA Display Stream Compression version 1.1/1.2.
VBYONE Transmitter core is compliant with standard VByOne specification as 1.2/1.3/1.4.
VBYONE Receiver core is compliant with standard VByOne specification as 1.2/1.3/1.4.
MIPI STP MASTER interface provides full support for the PTI which is a generic high performance parallel interface, support for t…
MIPI SPMI Slave DMA interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI…
MIPI SPMI Slave interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI spe…
MIPI SPMI Master interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI sp…
MIPI DSI-2 Transmitter interface provides full support for the two-wire MIPI DSI-2 Transmitter synchronous serial interface, comp…
MIPI DSI-2 Receiver interface provides full support for the two-wire MIPI DSI-2 Receiver synchronous serial interface, compatible…
MIPI Debug Target interface IP provides full support for the two-wire MIPI Debug Target synchronous serial interface, compatible …
The HDMI Source IIP core supports the HDMI 1.4b/2.0b/2.1 specification.
The HDMI Sink IIP core supports the HDMI 1.4b/2.0b/2.1 specification.
HDMI eARC TRANSMITTER interface provides full support for the two-wire HDMI eARC TRANSMITTER synchronous serial interface, compat…
HDMI eARC RECEIVER interface provides full support for the two-wire HDMI eARC RECEIVER synchronous serial interface, compatible w…
The Consumer Electronics Control (HDMI-CEC) is a bi-directional serial bus designed to control multiple HDMI devices with a singl…
eDP Transmitter core is compliant with standard eDP 1.4b specification.
eDP Receiver core is compliant with standard eDP 1.4b specification.
DSC ENCODER core is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a.