16 state DVB-RCS2 Turbo Encoder
This is a 16 state DVB-RCS2 compatible parallel concatenated turbo encoder.
- Channel Coding
- Now
- ETSI EN 301 545–2 V1.1.1, J…
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
16 state DVB-RCS2 Turbo Encoder
This is a 16 state DVB-RCS2 compatible parallel concatenated turbo encoder.
AI and DSP performance leader with up to 4X the NN performance and 2X the DSP performance of the HiFi 4 DSP, ideal for digital as…
First High Performance Split-Lock DynamIQ CPU
The all new Arm Cortex-A family of Automotive Enhanced (AE) high performance processors is designed for devices undertaking compl…
Smallest and lowest power DSP for narrowband wireless communications and always-on applications The Cadence® Tensilica® Fusion F1…
Compact High-Speed 64-bit CPU Core
AndesCore™ NX25F is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is t…
FlexCFR is a communications standard agnostic, crest factor reduction solution.
High-performance 32-bit Superscalar Processor
C810 utilizes a 10-stage superscalar pipeline, with a standard memory management unit, and can run Linux and other operating syst…
Energy-efficient 32-bit superscalar processor
C807 utilizes an 8-stage pipeline and dual-issue superscalar architecture, with a standard memory management unit, and can run Li…
Low power 32-bit processor with secure execution capability
E803 utilizes a 3-stage sequential pipeline to achieve an optimized balance between performance and cost.
Ultra-low power 32-bit processor with secure execution capability
E802 utilizes a 2-stage minimalistic pipeline and optimizes average and peak power consumption.
Ultra-low-cost 32-bit processor
E801 is has the lowest cost and lowest power consumption among T-Head processors.
High-performance 32-bit multi-core processor with AI acceleration engine
C860 utilizes a 12-stage superscalar pipeline, with a standard memory management unit, and can run Linux and other operating syst…
The IPrium-ATSC-8VSB-Modulator IP Core implements the USA DTV standard ATSC A/53 Part 2.
TC5300 is an efficient Polar encoder/decoder Core solution compliant with 3GPP NR (5G) specifications.
TC5200 is an efficient LDPC encoder/decoder Core solution fully compliant with 3GPP NR (5G) specifications.
RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a use…
ASIC IP-core for very-high-throughput decoding (>20G) of 3GPP 5G Release 15
Very high throughput (>20 Gbps) LDPC decoder and encoder for 3GPP 5G Release 15.
Extremely Low Latency Matching Engine Synthesizable IP Core
Axonerve is a next generation variant of the content-addressable memory (CAM) solution.
Neural Network Acceleration for Automotive AI
State-of-the-art NPU for automotive inference, with many features built-in to maximize performance for a wide range of automotive AI applications.
16 State DVB-S2/DVB-S2X Tail Biting Viterbi Decoder
The VA04D is a 16 state tail-biting error control decoder using the maximum likelihood Viterbi algorithm.