Vendor: T-Head Category: CPU

High-performance 32-bit multi-core processor with AI acceleration engine

C860 utilizes a 12-stage superscalar pipeline, with a standard memory management unit, and can run Linux and other operating syst…

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Overview

C860 utilizes a 12-stage superscalar pipeline, with a standard memory management unit, and can run Linux and other operating systems. It also utilizes a 3-issue and 8-execution deep out-of-order execution architecture, with a single/double-precision floating point engine. It can be equipped with an AI acceleration engine. It is suitable for application fields requiring high server performance, such as intelligent monitoring, machine vision and edge servers.

Key features

  • Instruction set: T-Head ISA (32-bit/16-bit variable-length instruction set);
  • Multi-core: Isomorphic multi-core, with 1 to 4 optional cores;
  • Pipeline: 12-stage;
  • Microarchitecture: Tri-issue, deep out-of-order;
  • General register: 32 32-bit GPRs; 16 128-bit VGPRs;
  • Cache: 2-stage cache; I-cache: 32 KB/64 KB (size options); D-cache: 32 KB/64 KB (size options); L2 Cache: 128 KB-2 MB (size options);
  • Cache check: Optional ECC check or parity check;
  • Bus interface: 1 128-bit master interface; 1 128-bit slave interface;
  • Memory protection: On-chip memory management unit supports hardware backfilling;
  • Floating point engine: Supports single and double precision floating point operations;
  • AI vector calculation engine: Dual-line 128-bit operation width, supporting half-precision/single-precision/8-bit/16-bit/32-bit parallel computing;
  • ng half-precision/single-precision/8-bit/16-bit/32-bit parallel computing
  • Multi-core consistency: Multiple-core shared L2-cache, and supports cache data consistency;
  • Interrupt controller: Supports a multi-core shared interrupt controller;
  • Debugging: Supports multi-core collaborative debugging;
  • Performance monitoring: Supports a hardware performance monitoring unit;
  • AI acceleration engine: Provides dedicated acceleration instructions to accelerate various typical neural networks;
  • Hybrid branch processing: Hybrid branch processing technology including branch direction, branch address, function return address and indirect jump address prediction to improve the fetching efficiency;
  • Data prefetching: Multi-channel and multi-mode data prefetching technology greatly improves data access bandwidth.

Block Diagram

C860 block diagram

Applications

  • Intelligent Vision;
  • Smart Home Appliances.

Specifications

Identity

Part Number
C860
Vendor
T-Head
Type
Silicon IP

Files

Product Sheet Download

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Provider

T-Head
HQ: China
PingTouGe Semiconductor Co., Ltd is the business entity of Alibaba Group specializing in semiconductor chips, with the primary goal of developing the next-generation of cloud integrated chip architecture, data centers and embedded IoT chip products. PingTouGe achieves cloud and terminal technological innovation through in-depth software and hardware collaboration, with the aspiration of making data and computing more inclusive, while also continuously pushing the boundaries of data technology.
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Frequently asked questions about CPU IP cores

What is High-performance 32-bit multi-core processor with AI acceleration engine?

High-performance 32-bit multi-core processor with AI acceleration engine is a CPU IP core from T-Head listed on Semi IP Hub.

How should engineers evaluate this CPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.

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