Vendor: WASIELA Category: Channel Coding

DVB-S2X-LDPC Decoder

DVB-S2X-LDPC Decoder

Key features

  • Irregular parity check matrix coding
  • Layered Decoding
  • Minimum sum algorithm
  • Soft decision decoding
  • ETSI EN 302 307-2 V1.1.1 compliant
  • Long, medium, and short codeword lengths are supported (16200, 32400 and 64800 bits)
  • All code rates of EN 302 307-2 V1.1.1 standard are supported

Benefits

  • Improved performance
  • Improved efficiency w.r.t. Shannon's limit
  • Finer gradation of code rate and SNR
  • Very high data rate
  • Maximum service availability at highest efficiency
  • Enables cross layer optimization

What’s Included?

  • Synthesizable Verilog
  • System Model (Matlab) and documentation
  • Verilog Test Benches
  • Documentation

Specifications

Identity

Part Number
DVB-S2X-LDPC Decoder
Vendor
WASIELA
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Egypt

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

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Frequently asked questions about Channel Coding IP cores

What is DVB-S2X-LDPC Decoder?

DVB-S2X-LDPC Decoder is a Channel Coding IP core from WASIELA listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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