Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
Gigabit-range, low complexity LDPC decoder
TC4902 is ideally suited for applications requiring a very efficient throughput/area ratio, while not sacrificing SNR performance.
Error Correction Checking (ECC) Core
The Xilinx LogiCORE™ IP ECC core is ideal for robust data transmission with error correction and checking capabilities.
Xilinx provides a generic forward error correction (FEC) engine to generate and insert a SMPTE ST2022 compliant video over IP FEC…
The Backhaul Low Density Parity Check (LDPC) core IP provides a high-performance forward error correction (FEC) solution for mobi…
Flash Memory LDPC Error Correction
The Xilinx® LogiCORE™ IP Flash Memory low-density parity-check (LDPC) Error Correction core is a major component for improving fl…
The CMS0069 DVB-CID Modulator provides all the necessary processing steps to modulate the Content-ID table into a complex I/Q sig…
Included at no additional charge with EDK software.
MicroBlaze™ is Xilinx 32-bit RISC Harvard architecture soft processor core with a rich instruction set optimized for embedded app…
LDPC Decoder and Encoder that supports DVB-S2 DVB-S2X DVB-T2 DVB-C2 CMMB DMB-T
LDPC Decoder and Encoder that supports DVB-S2 DVB-S2X DVB-T2 DVB-C2 CMMB DMB-T
32-bit version of 8-bit 65C02 microprocessor
The V65C02 is a synthesizable VHDL (soft) core design which is object code compatible with MOS Technologies's (and others') popul…
The Vr2000 is a synthesizable VHDL (soft) core design which is object code compatible with MIPS' popular R2000.
32-bit version of 8-bit 65C02 microprocessor
The V65C32 is a synthesizable VHDL (soft) core design which is object code compatible with MOS Technologies's (and others') popul…
The 8051 IP Core was developed in cooperation with the Arbeitsgruppe CAD / TU-Wien.
The 3GPP Mixed Mode Turbo Decoder provides a flexible turbo convolutional decode function for both LTE and UMTS air interfaces.
Important Notice: The VIPP package and its cores are in maintenance mode and not recommended for new designs.
The Zaltys DVB-S2 Modulator (DVBS2-M) IP core is a variant of the Zaltys HDRM-M Modulator core which implements a DVB-S2 complian…
The Zaltys DVB-S2 Demodulator (DVBS2-D) IP core is a variant of the Zaltys HDRM-D2 demodulator core which implements a DVB-S2 com…
The Zaltys High Data Rate Modulator (HDRM-M) IP core efficiently realizes the digital baseband section of a high performance mode…
High Data Rate Enhanced Demodulator
The Zaltys High Data Rate Demodulator (HDRM-D) and the Zaltys Enhanced High Data Rate Demodulator (HDRM-D2) IP cores efficiently …
PicoBlaze 8-bit Microcontroller
PicoBlaze™ is a fully embedded 8-bit RISC microcontroller core optimized for 7-series and older Xilinx FPGA architectures.