64-bit High Performance Out-of-Order Processor - Out-of-Order, 3/4/6-Wide Decode
The UX1000 Series have three different variants: UX1030, UX1040 and UX1060.
- CPU
Compute and acceleration IP cores are specialized hardware blocks designed to improve performance and efficiency in modern SoC and ASIC designs.
This category covers a diverse ecosystem of processing technologies, including CPU and microcontroller cores for embedded control and software execution, AI/ML accelerators for neural network processing, DSP and math engines for real-time signal processing, data compression accelerators for efficient storage and communications, and eFPGA fabrics that provide post-silicon flexibility and hardware reconfigurability.
Whether you are designing for edge AI, automotive systems, consumer electronics, or data center acceleration, you can identify the right IP to optimize your system performance.
64-bit High Performance Out-of-Order Processor - Out-of-Order, 3/4/6-Wide Decode
The UX1000 Series have three different variants: UX1030, UX1040 and UX1060.
32-Bit & 64-Bit High Performance Processor - 9-Stage Pipeline, Dual-issue
900 Series processors include four different classes: N900 (32 bit), U900 (32 bit + MMU), NX900 (64 bit) and UX900 (64 bit + MMU).
32-Bit High Efficiency Processor - 3-Stage Pipeline, Single/Dual-issue
N300 Series is a 32-bit RISC-V processor designed for applications requiring extreme energy efficiency and DSP/FPU features.
32-Bit Low Power Processor - 2-Stage Pipeline, Single-issue
N200 Series is designed for deeply embedded application with low power and area consumption.
RVA23, Multi-cluster, Hypervisor and Android
AndesCore™ AX66 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on An…
64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
AndesCore™ AX46MP(V) 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeS…
32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
AndesCore™ A46MP(V) 32-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeSt…
32-bit Multiprocessors with Level-2 Cache-Coherence
AndesCore™ A45MP 32-bit multicore CPU IP is an 8-stage superscalar processor based on AndeStar™ V5 architecture.
In Digital video broadcasting for digital transmission for satellite applications, a FEC (Forward Error Correction) sub-system is…
The K-best decoder is part of the MIMO decoder.
Edge-friendly LLM and CNN AI Inference processing Edge devices are increasingly equipped with AI processing capabilities that enh…
Mobile-Centric LLM and CNN AI Inference processing Consumers are excited about the latest AI features in smartphones.
High Performance Scalability across Complex Models Cloud-based AI inference is the backbone of retail, e-commerce, healthcare, in…
Whether deployed in-cabin for driver distraction or in the driver assistance system (ADAS) stack for object recognition and point…
This core can perform the two dimensional Discrete Cosine Transform (DCT) and its inverse (IDCT) on an 8x8 block of samples.
Hierarchical scalability is the foundation principle of the Fibonacci machine-learning (ML) system-on-chip (SoC).
The XC23 is the most DSP core available today for communications applications.
Color Space converter & Chroma Resampler- 4:4:4 RGB to 4:2:2 Y’CbCr
The DB1825 Color Space Converter & Chroma Resampler Verilog IP Core transforms 4:4:4 sampled RGB color components to 4:4:4 Y’CbCr…
4:4:4 Y’CbCr to 4:2:2 Y’CbCr Chroma Resampler (ITU-R BT.601)
The DB1820 Chroma Resampler IP Core down converts 4:4:4 Y’CbCr to 4:2:2 Y’CbCr in accordance with the ITU-R BT.601 standard requi…
Highly configurable HW PQC acceleration with RISC-V processor for full CPU offload
configurable HW PQC acceleration with RISC-V processor for full CPU offload, configurable as Subsystem or RoT, with SCA and FIA p…