Optimizing Data Movement In SoCs And Advanced Packages
The amount of data that needs to move around a chip is growing exponentially, driven by the rollout of AI and more sensors everywhere. There may be hundreds of IP blocks, more compute elements, and many more wires to contend with. Andy Nightingale, vice president of product management and marketing at Arteris, talks with Semiconductor Engineering about the demand for low-latency on-chip communication in increasingly complex devices, which can include chiplets, multiple networks on chip (NoCs), and the need for managing all of this with less power and using a simpler setup.
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