Livelocks And Deadlocks In NoCs
Devices that are stuck in a specific state, or which appear to be making progress even though they are not, are common problems in complex systems. Processing elements need to fetch data they don't have from routers may be frozen out by other processors, a problem that is exacerbated by common bus protocols. Ashish Darbari, CEO of Axiomise, talks with Semiconductor Engineering about how to identify potential bottlenecks, why and when they occur, and what can be done to prevent them.
Related Semiconductor IP
- NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
- NoC Verification IP
- FlexGen Smart Network-on-Chip (NoC) IP
- NoC System IP
- Non-Coherent Network-on-Chip (NOC)
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