Safety in SoCs: Accelerating the Road to ISO 26262 Certification for the ARC EM Processor
By Steven Parkinson, R&D Engineer, Synopsys
Today’s system-on-chip (SoC) designs are becoming more complex, increasing the pressure on verification and design teams to deliver fully functional designs. Recent studies have shown that over 50% of the development time on a complex IC is now being spent on verification, revealing the severity of the problem project teams are facing. As more SoC designs are used in electronic systems deployed in safety-critical applications, adhering to functional safety standards such as ISO 26262 has become an important consideration when defining the verification methodology. This white paper outlines the key requirements for ISO 26262 certification and demonstrates how to accelerate the development of safety-critical IP and SoCs through the use of out-of-the-box safety-ready IP with advanced verification qualification tools and methodologies.
Related Semiconductor IP
- Zigbee Transceiver PHY
- Data Flow Architecture IP
- AMBA SPI Controller MRAM Controller
- Ethernet MAC
- Protocol Bridges
Related Articles
- Fundamentals of Semiconductor ISO 26262 Certification: People, Process and Product
- Is Your Processor IP ISO 26262-Compliant?
- An AUTOSAR-Aligned Architectural Study of Vulnerabilities in Automotive SoC Software
- Safety Verification and Optimization of Automotive Ethernet Using Dedicated SoC FIT Rates
Latest Articles
- A Low-Latency ASIC Architecture for Real-Time Line Segment Detection
- BitFair: A 12nm Bit-Serial CNN Accelerator with Learnable Early Termination and Adaptive Bit Ordering for Ultra-Low-Power XR Vision
- A Flexible Sparsity-Aware FPGA Accelerator with Column-Wise Compression for Efficient CNN Inference
- Reducing Instruction-Fetch Energy in RISC-V for Embedded AI Processing via Dynamic and Static Loop Caching
- SPARC: Automated Root-Cause Analysis of Pre-Silicon Power Side-Channel Leakage in the Processor Design Flow