IP still strong despite slump

IP still strong despite slump
By William Peavey, President and Chief Executive Officer, NurLogic Design Inc., San Diego, EE Times
July 24, 2002 (12:12 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020724S0047

While the general semiconductor industry seems to be in a slump, vendors of semiconductor intellectual property (IP) are experiencing healthy growth. But it's not just by chance. Smart IP vendors decided on a few key design service partnerships 12 to 18 months ago that will help to sustain the growth pattern into the next several months.

According to Gartner Dataquest, the IP industry grew at a 25 percent rate in 2001, while the semiconductor industry declined 31 percent. In addition, while ASIC design starts are down significantly, application-specific standard products remain strong. Although prototyping-to-production starts overall were down, design starts in the newest technologies remained fair ly high.

Coupled with new process technologies is the desire for greater levels of integration on chips and the need for IP vendors to deliver best-in-class cores. These higher-level cores offer wraparound functionality, reducing the amount of IP elements that must be integrated onto a complex system-on-chip (SoC) design. As an example, fabless semiconductor companies are turning to NurLogic for high-speed connectivity IP including bus interface cores, communication cores, analog timing blocks and libraries.

Today, IP vendors like NurLogic are providing silicon-proven critical core solutions, which aid in the reduction of the SoC designer's time-to-market. At the same time, design service providers offer a design flow methodology for these complex SoC designs. NurLogic is teaming with design service houses such as eSilicon, Intel Microelectronics Services, Simplex, Synopsys and Tality to help deliver a silicon-proven design flow, particularly for fabless semiconductor companies and even majo r integrated device manufacturers.

We see this partnership approach continuing over the next several months because it offers a silicon-proven reference design flow. Our goal in putting these partnerships in place is to give the customers confidence in our IP because it has been validated and verified. In many cases, the design service partner's reference flows are also validated by the foundries. So, between the IP vendor, design service house and foundry, there's a three-way partnership that includes the silicon.

Critical design teams are remaining in-house, but outsourcing is growing. Silicon-proven cores give the buyer a sense of security. However, most of the time design service houses don't have access to their customers' test results. So, partnering with an IP vendor that produces its own test chips to validate the IP creates a win-win situation for all involved.