Taiwan Trip Report: Semiconductors, EDA, and the ASIC Business!
Just returning from my monthly trip to Taiwan and I find myself energized! Semiconductors, EDA, and the ASIC business have never been more exciting! The travel itself is not so exciting but since I make frequent trips the airline and hotel treat me like a king. And let me tell you, it is good to be a king!
Speaking of royalty, I saw Dr. Morris Chang at the Royal Hsinchu Hotel on Wednesday night. He made it up the two flights of lobby stairs faster than I did! It truly would be an honor to write his autobiography, let’s hope someone does it soon.
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