Avalon Multi-port DDR2 Memory Controller
The Avalon Multi-port DDR2 Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in…
- DDR
- Available for immediate sale
Avalon Multi-port DDR2 Memory Controller
The Avalon Multi-port DDR2 Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in…
DDR/DDR2 SDRAM Controller MACO Core
The DDR/DDR2 Synchronous Dynamic Random Access Memory (SDRAM) Controller MACO Core is a general-purpose memory controller that in…
DDR1 DDR2 SDRAM Memory Controller
Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.
PCI Express to VME64x Transparent Bridge
IP
DDR2 SDRAM Controller - Pipelined
The Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller tha…
Synopsys offers a system-level memory interface IP portfolio for SoCs requiring an interface to one or a range of high-performanc…
Synopsys offers a system-level memory interface IP portfolio for SoCs requiring an interface to one or a range of high-performanc…
LatticeMico32 Open, Free 32-Bit Soft Processor
The LatticeMico32™ is a 32-bit Harvard, RISC architecture "soft" microprocessor, available for free with an open IP core licensin…
SDRAM/SRAM/FLASH Memory Controller
Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.
Avalon Multi-port SDRAM Memory Controller IP Core
The Microtronix Avalon Multi-port SDRAM Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II…
The Enhanced Universal DDR Controllers consist of two high-performance products: the Enhanced Universal DDR Memory Controller (uM…
The Enhanced Universal DDR Controllers consist of two high-performance products: the Enhanced Universal DDR Memory Controller (uM…
DDR Enhanced Protocol Controller (uPCTL2) supporting DDR4, DDR3, DDR2, LPDDR4, LPDDR3, and LPDDR2
The Enhanced Universal DDR Controllers consist of two high-performance products: the Enhanced Universal DDR Memory Controller (uM…
The DDR3/2 PHY cores are mixed-signal PHY IP cores that supply the physical interface to JEDEC standard DDR3 and DDR2 SDRAM memor…
High-Performance Memory Controller II SDRAM Intel® FPGA IP Core
The High-Performance Memory Controller II SDRAM Intel FPGA IP core handles the complex aspects of using DDR, DDR2, and DDR3 SDRAM…
Streaming Multi-port SDRAM Memory Controller
The Streaming Multi-port SDRAM Memory Controller IP Core provides a native RD or WR local port bus interface to SDRAM memory.
DDR3/DDR3L Compatible I/O Buffer on TSMC CLN40G
The impedance programmable I/O buffer provides a high-speed physical interface solution to support the increasing bandwidths dema…
DDR and DDR2 SDRAM Controller Intel® FPGA IP Core
The DDR and DDR2 SDRAM controllers handle the complex aspects of using DDR and DDR2 SDRAM—initializing the memory devices, managi…
DO-254 DDR Memory Controller 1.00a
A dedicated embedded block multi-port memory controller that greatly simplifies the task of interfacing Spartan-6 devices to the …
DO-254 AXI 7-Series DDRx (Limited) 1.00a
Maps AXI4 transactions coming from the MicroBlaze™ to the User Interface Block providing an industry-standard bus protocol interf…